Abstract: A semiconductor thin-film manufacturing method includes: forming, above a substrate, an amorphous silicon film (precursor film) having a photoluminescence (PL) intensity greater than or equal to 0.65 when photon energy is 1.1 eV in a PL spectrum normalized to have a maximum PL intensity of 1; and annealing the amorphous silicon film to form a crystalline silicon film.

Abstract: A crystallinity evaluation method of evaluating crystallinity of a semiconductor film formed above a substrate includes following steps. First, a peak waveform of a Raman band in a Raman spectrum of the semiconductor film is obtained using Raman spectrometry. The Raman band corresponds to a phonon mode unique to the semiconductor film. The peak waveform is a wavelength range having a peak of the Raman band. Next, a first waveform is generated by fitting the obtained peak waveform by Gauss function. Then, a peak value of the first waveform is extracted. Then, a second waveform is generated by fitting the obtained peak waveform by Lorenz function based on the extracted peak value. Then, a peak value, a FWHM, and/or a wavelength indicating the peak value regarding the generated second waveform are obtained. Then, crystallinity of the semiconductor film is evaluated based on the obtained information.

Abstract: A thin-film semiconductor device manufacturing method according to the present disclosure includes: preparing a substrate; forming a gate electrode above the substrate; forming a gate insulating film above the substrate; forming an amorphous film (amorphous silicon film) above the substrate; forming a crystalline film (crystalline silicon film) including a first crystal and a second crystal, by crystallizing the amorphous film, the first crystal (i) containing subgrains formed with different crystal orientations in a single crystal and (ii) including a subgrain boundary formed by plural crystal planes between the subgrains, the second crystal having an average crystal grain size smaller than an average crystal grain size of the first crystal; thinning the crystalline film; and forming a source electrode and a drain electrode above the substrate.

Abstract: A thin-film transistor device includes a gate electrode formed above a substrate, a gate insulating film formed on the gate electrode, a crystalline silicon thin film that is formed above the gate insulating film and has a channel region, an amorphous silicon thin film formed on the crystalline silicon thin film, and a source electrode and a drain electrode that are formed above the channel region, and the crystalline silicon thin film has a half-width of a Raman band corresponding to a phonon mode specific to the crystalline silicon thin film of 5.0 or more and less than 6.0 cm?1, and an average crystal grain size of about 50 nm or more and 300 nm or less.

Abstract: A thin-film transistor device includes a gate electrode formed above a substrate, a gate insulating film formed on the gate electrode, a crystalline silicon thin film that is formed above the gate insulating film and has a channel region, an amorphous silicon thin film formed on the crystalline silicon thin film, and a source electrode and a drain electrode that are formed above the channel region, and the crystalline silicon thin film has a half-width of a Raman band corresponding to a phonon mode specific to the crystalline silicon thin film of 5.0 or more and less than 6.0 cm?1, and an average crystal grain size of about 50 nm or more and 300 nm or less.

Abstract: A thin-film semiconductor device manufacturing method according to the present disclosure includes: preparing a substrate; forming a gate electrode above the substrate; forming a gate insulating film above the substrate; forming an amorphous film (amorphous silicon film) above the substrate; forming a crystalline film (crystalline silicon film) including a first crystal and a second crystal, by crystallizing the amorphous film, the first crystal (i) containing subgrains formed with different crystal orientations in a single crystal and (ii) including a subgrain boundary formed by plural crystal planes between the subgrains, the second crystal having an average crystal grain size smaller than an average crystal grain size of the first crystal; thinning the crystalline film; and forming a source electrode and a drain electrode above the substrate.

Abstract: A PDP can be driven at low voltage while having a charge retention property in a protection layer, and has favorable image display properties. Additionally, the PDP prevents the occurrence of discharge delay and realizes high-quality image display by performing favorable high-speed driving in a high definition PDP. To achieve this, a surface layer (8) is formed to a film thickness of 1 ?m in an oxygen atmosphere having an oxygen partial pressure of 0.025 Pa or more, the surface layer (8) is provided on a face of a dielectric layer (7) on a discharge space side. Furthermore, MgO particles (16) are dispersed on a surface of the surface layer (8). The surface layer (8) has the effects of protecting the dielectric layer (7) from ion bombardment during discharge, reducing the firing voltage, and preventing excessive electron loss. Also, the MgO particles (16) have a high initial electron emission property.

Abstract: A PDP can be driven at low voltage while having a charge retention property in a protection layer, and has favorable image display properties. Additionally, the PDP prevents the occurrence of discharge delay and realizes high-quality image display by performing favorable high-speed driving in a high definition PDP. To achieve this, a surface layer (8) is formed to a film thickness of 1 ?m in an oxygen atmosphere having an oxygen partial pressure of 0.025 Pa or more, the surface layer (8) is provided on a face of a dielectric layer (7) on a discharge space side. Furthermore, MgO particles (16) are dispersed on a surface of the surface layer (8). The surface layer (8) has the effects of protecting the dielectric layer (7) from ion bombardment during discharge, reducing the firing voltage, and preventing excessive electron loss. Also, the MgO particles (16) have a high initial electron emission property.

Abstract: A plasma display panel having a dielectric protection layer (14) including MgO and phosphorlayers (25R, 25G, 25B) for red, green, and blue respectively wherein none of the phosphor layers contain any member of the group consisting of Group IV elements, transition metals, alkali metals, and alkaline earth metals, or wherein all the phosphor layers each contain a specific amount of one or more members of the group consisting of Group IV group elements, transition metals, alkali metals and alkaline earth metals. In such a plasma display panel, changes over the course of time in the impedance of the dielectric protection layer (14) is suppressed, and the phosphor layers are uniform with respect to the directional characteristics of the changes of the impedances, which results in suppression of occurrence of black noise.

Abstract: An object of the present invention is to provide a plasma display panel and a manufacturing method thereof that can prevent a dielectric layer and a protective layer from being deteriorated and give excellent image display performance, by performing a sealing process effectively. The object can be realized by a plasma display panel including a front panel 10 and a back panel 11 arranged in opposing to each other at a certain gap, the front panel and the back panel being sealed by a sealing layer 17 that is provided on entire peripheral portions of main surfaces of the front panel and the back panel, and the sealing layer is composed of at least one material selected from the group consisting of an organic resin material, an inorganic material, and a metal material (more specifically, a silica material as a main component and an epoxy resin material).

Abstract: A plasma display panel having a dielectric protection layer (14) including MgO and phosphorlayers (25R, 25G, 25B) for red, green, and blue respectively wherein none of the phosphor layers contain any member of the group consisting of Group IV elements, transition metals, alkali metals, and alkaline earth metals, or wherein all the phosphor layers each contain a specific amount of one or more members of the group consisting of Group IV group elements, transition metals, alkali metals and alkaline earth metals. In such a plasma display panel, changes over the course of time in the impedance of the dielectric protection layer (14) is suppressed, and the phosphor layers are uniform with respect to the directional characteristics of the changes of the impedances, which results in suppression of occurrence of black noise.

Abstract: This invention concerns with a semiconductor device which is characterized in that the device is provided with a thin film transistor 40 having a polycrystalline semiconductor layer 11, the semiconductor layer 11 including a channel area 22, highly doped drain areas 24, 17 positioned on both sides of the channel area 22 and LDD areas 18a, 18b positioned between the channel area 22 and the highly doped drain areas 24, 17 and lower in dopant density than the highly doped drain areas 24, 17, wherein any diameter of the crystal 14 at least partly existing in the LDD area 18b is larger than the size of other crystals 15.

Abstract: This invention concerns with a semiconductor device which is characterized in that the device is provided with a thin film transistor 40 having a polycrystalline semiconductor layer 11, the semiconductor layer 11 including a channel area 22, highly doped drain areas 24, 17 positioned on both sides of the channel area 22 and LDD areas 18a, 18b positioned between the channel area 22 and the highly doped drain areas 24, 17 and lower in dopant density than the highly doped drain areas 24, 17, wherein any diameter of the crystal 14 at least partly existing in the LDD area 18b is larger than the size of other crystals 15.

Abstract: In a polycrystalline silicon thin film transistor, a semiconductor device having a high field effect mobility is achieved by increasing a grain size of a silicon thin film. First, an insulation layer having a two-layer structure is formed on a transparent insulated substrate 201. In the insulation layer, a lower insulation layer 202, which is in contact with the transparent insulating substrate 201, is made to have a higher thermal conductivity than an upper insulation layer 203. Thereafter, the upper insulation layer 203is patterned so that a plurality of stripes are formed thereon. Subsequently, an amorphous silicon thin film 204 is formed on the patterned insulation layer, and the insulation layer is irradiated with a laser light scanning in a direction parallel to the stripe pattern on the upper insulation layer 203. Thus, the amorphous silicon thin film 203 is formed into a polycrystalline silicon thin film 210.

Abstract: In a polycrystalline silicon thin film transistor, a semiconductor device having a high field effect mobility is achieved by increasing a grain size of a silicon thin film. First, an insulation layer having a two-layer structure is formed on a transparent insulated substrate 201. In the insulation layer, a lower insulation layer 202, which is in contact with the transparent insulating substrate 201, is made to have a higher thermal conductivity than an upper insulation layer 203. Thereafter, the upper insulation layer 203 is patterned so that a plurality of stripes are formed thereon. Subsequently, an amorphous silicon thin film 204 is formed on the patterned insulation layer, and the insulation layer is irradiated with a laser light scanning in a direction parallel to the stripe pattern on the upper insulation layer 203. Thus, the amorphous silicon thin film 203 is formed into a polycrystalline silicon thin film 210.

Abstract: In a polycrystalline silicon thin film transistor, a semiconductor device having a high field effect mobility is achieved by increasing a grain size of a silicon thin film. First, an insulation layer having a two-layer structure is formed on a transparent insulated substrate 201. In the insulation layer, a lower insulation layer 202, which is in contact with the transparent insulating substrate 201, is made to have a higher thermal conductivity than an upper insulation layer 203. Thereafter, the upper insulation layer 203. is patterned so that a plurality of stripes are formed thereon. Subsequently, an amorphous silicon thin film 204 is formed on the patterned insulation layer, and the insulation layer is irradiated with a laser light scanning in a direction parallel to the stripe pattern on the upper insulation layer 203. Thus, the amorphous silicon thin film 203 is formed into a polycrystalline silicon thin film 210.

Abstract: The present invention provides methods of fabricating a non-single crystal film, whereby variations in crystal grain size are reduced and the periodicity of grain size is improved. The methods of fabricating a non-single crystal film of the present invention include: first, forming a non-single crystal film and then optimizing laser irradiation by monitoring diffracted light; and second, performing laser irradiation with a substrate having been cooled.