Patents by Inventor Himani S. Kamineni

Himani S. Kamineni has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Through-silicon via unit cell with keep out zones and center point aligned probe pad, and method of forming
    Patent number: 9123787
    Abstract: Exemplary embodiments of the present invention provide a V0 via unit cell with multiple keep out zones. The keep out zones are oriented concentrically and provide support for multiple sizes of through-silicon vias (TSVs). An off-center alignment between the V0 via unit cell and a probe pad is used to improve contact between the V0 vias and a probe pad. During a chip redesign, the TSV size may be changed without the need to revise the V0 mask.
    Type: Grant
    Filed: September 17, 2013
    Date of Patent: September 1, 2015
    Assignee: GlobalFoundries Inc.
    Inventors: Himani S. Kamineni, Ramakanth Alapati, Maria Balicka
  • THROUGH-SILICON VIA UNIT CELL AND METHODS OF USE
    Publication number: 20150076706
    Abstract: Exemplary embodiments of the present invention provide a V0 via unit cell with multiple keep out zones. The keep out zones are oriented concentrically and provide support for multiple sizes of through-silicon vias (TSVs). An off-center alignment between the V0 via unit cell and a probe pad is used to improve contact between the V0 vias and a probe pad. During a chip redesign, the TSV size may be changed without the need to revise the V0 mask.
    Type: Application
    Filed: September 17, 2013
    Publication date: March 19, 2015
    Applicant: GLOBAL FOUNDRIES Inc.
    Inventors: Himani S. Kamineni, Ramakanth Alapati, Maria Balicka