Abstract: An ultrasonic transducer includes an elongated transducer body with an aperture for mounting a piezoelectric driver stack for driving the ultrasonic transducer to operate at a first resonant frequency, a mounting flange for mounting the transducer body to a wire bonding machine, a rigid connecting member having first and second ends which are respectively connected to the mounting flange and the transducer body at a first nodal vibration region of the transducer body when the ultrasonic transducer is operated at the first resonant frequency and a flexible connecting member extending between the mounting flange and the transducer body at a second nodal vibration region of the transducer body when the ultrasonic transducer is operated at the first resonant frequency.

Abstract: An ultrasonic transducer that is configured to selectively operate at first or second resonant frequency during wire bonding operations includes an elongated transducer body an aperture for mounting a piezoelectric driver stack for driving the ultrasonic transducer to operate at the first or second resonant frequency and a mounting flange connected to the transducer body at a first nodal vibration region of the transducer body when the ultrasonic transducer is operated at the first resonant frequency. The elongated transducer has a length substantially equal to two wavelengths of a first oscillatory wave that is transmitted along the length of the transducer body when the transducer is operated at the first resonant frequency, and substantially equal to a half wavelength of a second oscillatory wave that is transmitted along the length of the transducer body when the transducer is operated at the second resonant frequency.

Abstract: A power converter reduces output ripple without using an electrolytic primary-side capacitor that can reduce product lifetime. Primary-Side Regulation (PSR) using an auxiliary winding provides a regulated secondary voltage with some low-frequency ripple on a secondary winding of a transformer. A smaller secondary capacitor that is not an electrolytic capacitor filters the output of the secondary side. A bang-bang controller controls the secondary side current to reduce current ripple despite voltage ripple. The bang-bang controller has a series resistor and inductor in series with a load such as an LED. A voltage drop across the series resistor increases when a switch turns on. This increasing voltage drop toggles the switch off once an upper limit voltage is reached. The voltage drop then decreases as inductor current is shunted by a diode, until the voltage drop reaches a lower limit voltage and the switch toggles on again.

Abstract: A power converter reduces output ripple without using an electrolytic primary-side capacitor that can reduce product lifetime. Primary-Side Regulation (PSR) using an auxiliary winding provides a regulated secondary voltage with some low-frequency ripple on a secondary winding of a transformer. A smaller secondary capacitor that is not an electrolytic capacitor filters the output of the secondary side. A bang-bang controller controls the secondary side current to reduce current ripple despite voltage ripple. The bang-bang controller has a series resistor and inductor in series with a load such as an LED. A voltage drop across the series resistor increases when a switch turns on. This increasing voltage drop toggles the switch off once an upper limit voltage is reached. The voltage drop then decreases as inductor current is shunted by a diode, until the voltage drop reaches a lower limit voltage and the switch toggles on again.

Abstract: A fly-back power converter has a current-estimating control loop that senses the primary output current in a transformer to control the secondary output. A primary-side control circuit switches primary current through the transformer on and off. A discharge time when a secondary current through an auxiliary winding of the transformer is flowing is generated by sampling a voltage divider on an auxiliary loop for a knee-point. A normalized duty cycle is calculated by multiplying the discharge time by a current that is proportional to the switching frequency and comparing to a sawtooth signal having the switching frequency. The peak of a primary-side voltage is sensed from the primary current loop and converted to a current and multiplied by the normalized duty cycle to generate an estimated current. An error amp compares the estimated current to a reference to adjust the oscillator frequency and peak current to control primary switching.

Abstract: A fly-back power converter has a current-estimating control loop that senses the primary output current in a transformer to control the secondary output. A primary-side control circuit switches primary current through the transformer on and off. A discharge time when a secondary current through an auxiliary winding of the transformer is flowing is generated by sampling a voltage divider on an auxiliary loop for a knee-point. A normalized duty cycle is calculated by multiplying the discharge time by a current that is proportional to the switching frequency and comparing to a sawtooth signal having the switching frequency. The peak of a primary-side voltage is sensed from the primary current loop and converted to a current and multiplied by the normalized duty cycle to generate an estimated current. An error amp compares the estimated current to a reference to adjust the oscillator frequency and peak current to control primary switching.

Abstract: A fly-back AC-DC power converter has a constant-current control loop that senses the primary output current in a transformer to control the secondary output without an expensive opto-isolator. A primary-side control circuit can use either a Quasi-Resonant (QR) or a Pulse-Width-Modulation (PWM) control loop to switch primary current through the transformer on and off. A feedback voltage is compared to a primary-side voltage sensed from the primary current loop to turn the switch on and off. A multiplier loop generates the feedback voltage using a multiplier. A level-shift inverter and a low-pass filter act as the multiplier by multiplying an off duty cycle of the switch by the feedback voltage to generate a filtered voltage. A high-gain error amp compares the filtered voltage to a reference voltage to generate the feedback voltage. The multiplier produces a simple relationship between the secondary current and the reference voltage, yielding simplified current control.

Abstract: A frequency dithering circuit reduces emissions that cause Electro-Magnetic Interference (EMI) by spreading the spectrum of a clock. The clock sequences a counter that drives a digital count value to a digital-to-analog converter (DAC). The DAC outputs a sawtooth wave with a wide voltage swing. A subtractor scales down the voltage swing to produce a reduced-swing sawtooth wave which is used as an upper limit voltage. Comparators trigger a set-reset latch to toggle the clock when current pumps charge and discharge a capacitor beyond voltage limits. Since the upper limit voltage is the reduced sawtooth wave from the subtractor, the amount of time to charge the capacitor varies, dithering the period of the clock. The degree of dithering can be adjusted by programming the feedback resistance in the subtractor. The subtractor reduces the sensitivity of dithering to errors in the DAC, allowing for an inexpensive, less precise DAC.

Abstract: A frequency dithering circuit reduces emissions that cause Electro-Magnetic Interference (EMI) by spreading the spectrum of a clock. The clock sequences a counter that drives a digital count value to a digital-to-analog converter (DAC). The DAC outputs a sawtooth wave with a wide voltage swing. A subtractor scales down the voltage swing to produce a reduced-swing sawtooth wave which is used as an upper limit voltage. Comparators trigger a set-reset latch to toggle the clock when current pumps charge and discharge a capacitor beyond voltage limits. Since the upper limit voltage is the reduced sawtooth wave from the subtractor, the amount of time to charge the capacitor varies, dithering the period of the clock. The degree of dithering can be adjusted by programming the feedback resistance in the subtractor. The subtractor reduces the sensitivity of dithering to errors in the DAC, allowing for an inexpensive, less precise DAC.

Abstract: An electro-static-discharge (ESD) protection circuit protects core transistors. An internal node to the gate of an n-channel output transistor connects to the drain of an n-channel gate-grounding transistor to ground. The gate of the gate-grounding transistor is a coupled-gate node that is coupled by an ESD coupling capacitor to the output and to ground by an n-channel disabling transistor and a leaker resistor. The gate of the n-channel disabling transistor is connected to power and disables the ESD protection circuit when powered. An ESD pulse applied to the output is coupled through the ESD coupling capacitor to pulse high the coupled-gate node and turn on the gate-grounding transistor to ground the gate of the n-channel output transistor, which breaks down to shunt ESD current. The ESD pulse is prevented from coupling through a parasitic Miller capacitor of the n-channel output transistor by the gate-grounding transistor.

Abstract: A fly-back AC-DC power converter has a constant-current control loop that senses the primary output current in a transformer to control the secondary output without an expensive opto-isolator. A primary-side control circuit can use either a Quasi-Resonant (QR) or a Pulse-Width-Modulation (PWM) control loop to switch primary current through the transformer on and off. A feedback voltage is compared to a primary-side voltage sensed from the primary current loop to turn the switch on and off. A multiplier loop generates the feedback voltage using a multiplier. A level-shift inverter and a low-pass filter act as the multiplier by multiplying an off duty cycle of the switch by the feedback voltage to generate a filtered voltage. A high-gain error amp compares the filtered voltage to a reference voltage to generate the feedback voltage. The multiplier produces a simple relationship between the secondary current and the reference voltage, yielding simplified current control.

Abstract: An electro-static-discharge (ESD) protection circuit protects core transistors. An internal node to the gate of an n-channel output transistor connects to the drain of an n-channel gate-grounding transistor to ground. The gate of the gate-grounding transistor is a coupled-gate node that is coupled by an ESD coupling capacitor to the output and to ground by an n-channel disabling transistor and a leaker resistor. The gate of the n-channel disabling transistor is connected to power and disables the ESD protection circuit when powered. An ESD pulse applied to the output is coupled through the ESD coupling capacitor to pulse high the coupled-gate node and turn on the gate-grounding transistor to ground the gate of the n-channel output transistor, which breaks down to shunt ESD current. The ESD pulse is prevented from coupling through a parasitic Miller capacitor of the n-channel output transistor by the gate-grounding transistor.