Abstract: An exemplary CMOS image sensor comprises a reset transistor, a photodiode, reset drain voltage circuitry, and reset gate voltage circuitry. A cathode of the photodiode is connected to a source of the reset transistor, and an anode of the photodiode is connected to ground. The reset drain voltage circuitry is connected to a drain of the reset transistor, and the reset gate voltage circuitry is connected to a gate of the reset transistor. During an exemplary hard reset operation, the reset drain voltage circuitry supplies a first drain voltage to the drain of the reset transistor in accordance with a determined level of light for exposure, which is determined dynamically. According to another exemplary reset operation, a hard reset phase is immediately followed by a soft reset phase.

Abstract: An image sensor that has a temperature sensor. The temperature sensor senses the temperature of a pixel array of the image sensor. The sensed temperature is used to scale a dark frame image generated by the pixel array. The scaled dark frame image is subtracted from a light image frame generated by the pixel array. The scaled dark image frame compensates for temperature variations in the pixel array. The scaled dark image frame may be generated by multiplying the dark frame by a scale factor(s). The scale factor may be computed from an equation or determined from a look-up table. The equation or look-up table may compensate for thermal gradients across the pixel.

Abstract: A one time programmable solid-state device is provided such that the programmable solid-state device includes a programmable memory unit embedded in a die and a driver circuit that programs the programmable memory unit. The one time programmable solid-state device also includes an access circuit that enables access to the programmable memory unit. In an example operation when the one-time programmable solid-state is a solid-state image device, the one-time programmable solid-state device performs the process of identifying an address of a defective pixel in a photosensor having a plurality of pixels arranged in a two-dimensional array in the die and storing the address in the programmable memory unit that is embedded in the die of the solid-state imaging device.

Abstract: An exemplary CMOS image sensor comprises a reset transistor, a photodiode, reset drain voltage circuitry, and reset gate voltage circuitry. A cathode of the photodiode is connected to a source of the reset transistor, and an anode of the photodiode is connected to ground. The reset drain voltage circuitry is connected to a drain of the reset transistor, and the reset gate voltage circuitry is connected to a gate of the reset transistor. During an exemplary hard reset operation, the reset drain voltage circuitry supplies a first drain voltage to the drain of the reset transistor in accordance with a determined level of light for exposure, which is determined dynamically. According to another exemplary reset operation, a hard reset phase is immediately followed by a soft reset phase.

Abstract: An image sensor that has one or more pixels within a pixel array. The pixel array may be coupled to a control circuit and one or more subtraction circuits. The control circuit may cause each pixel to provide a first reference output signal and a reset output signal. The control circuit may then cause each pixel to provide a light response output signal and a second reference output signal. The light response output signal corresponds to the image that is to be captured by the sensor. The subtraction circuit may provide a difference between the reset output signal and the first reference output signal to create a noise signal that is stored in memory. The subtraction circuit may also provide a difference between the second reference output signal and the light response output signal to create a normalized light response output signal. The noise signal may then be subtracted from the normalized light response output signal to generate the output data of the sensor.

Abstract: An image sensor that has a temperature sensor. The temperature sensor senses the temperature of a pixel array of the image sensor. The sensed temperature is used to scale a dark frame image generated by the pixel array. The scaled dark frame image is subtracted from a light image frame generated by the pixel array. The scaled dark image frame compensates for temperature variations in the pixel array. The scaled dark image frame may be generated by multiplying the dark frame by a scale factor(s). The scale factor may be computed from an equation or determined from a look-up table. The equation or look-up table may compensate for thermal gradients across the pixel.

Abstract: An image sensor that has one or more pixels within a pixel array. The pixel array may be coupled to a control circuit and one or more subtraction circuits. The control circuit may cause each pixel to provide a first reference output signal and a reset output signal. The control circuit may then cause each pixel to provide a light response output signal and a second reference output signal. The light response output signal corresponds to the image that is to be captured by the sensor. The subtraction circuit may provide a difference between the reset output signal and the first reference output signal to create a noise signal that is stored in memory. The subtraction circuit may also provide a difference between the second reference output signal and the light response output signal to create a normalized light response output signal. The noise signal may then be subtracted from the normalized light response output signal to generate the output data of the sensor.

Abstract: A radiation receiving apparatus that comprises a pixel array and one or more microlenses located between the source of radiation and a less sensitive pixel in the pixel array. The arrangement of microlenses in a radiation receiving apparatus utilize a system architecture that recognizes that within a pixel array, there is typically a less sensitive pixel (i.e. one receiving light in the blue spectrum) and a more sensitive pixel (i.e. one receiving light in the red spectrum). A microlens is placed in physical proximity to the less sensitive pixel in order to decrease the inherent difference in sensitivity between the less sensitive pixel and the more sensitive pixel, in turn increasing the intensity of radiation incident upon the detecting area of the less sensitive pixel. The detecting area may include a photogate or a photodiode for sensing radiation.

Abstract: An image sensor with a light reader circuit coupled to a pixel array. The light reader circuit retrieves a first image and a second image generated by the pixel array. The image sensor may also include a memory controller and/or data interface that transfers the first and second images to an external device in an interleaving manner.

Abstract: An image sensor that has one or more pixels within a pixel array. The pixels are arranged within a plurality of rows within the array. Each row of the pixel array can be selected by a row decoder in response to an edge of a control signal. The control signal may be one of a plurality of signals generated by a processor coupled to the image sensor. The processor can control the exposure time of the pixels by varying the control signals. The control signals may also have an embedded narrow pulse that is used to determine the location of a “window” in the pixel array.

Abstract: An image sensor system with an image sensor that generates a first image and a second image. The first and second images are transmitted to a processor in a time overlapping manner. By way of example, the images may be transferred to the processor in an interleaving manner or provided on separate dedicated busses.

Abstract: An image sensor that has one or more pixels within a pixel array. The pixel array may be coupled to a control circuit and one or more subtraction circuits. The control circuit may cause each pixel to provide a first reference output signal and a reset output signal. The control circuit may then cause each pixel to provide a light response output signal and a second reference output signal. The light response output signal corresponds to the image that is to be captured by the sensor. The subtraction circuit may provide a difference between the reset output signal and the first reference output signal to create a noise signal that is stored in memory. The subtraction circuit may also provide a difference between the second reference output signal and the light response output signal to create a normalized light response output signal. The noise signal may then be subtracted from the normalized light response output signal to generate the output data of the sensor.

Abstract: An image sensor with a light reader circuit coupled to a pixel array. The light reader circuit retrieves a first image and a second image generated by the pixel array. The image sensor may also include a memory controller and/or data interface that transfers the first and second images to an external device in an interleaving manner.

Abstract: A comparator network includes a comparator and a switched capacitor front end coupled to the comparator. The switched capacitor front end includes an input signal sampling capacitance, a reference signal sampling capacitance, and a switch network for coupling the input signal sampling capacitance and the reference signal sampling capacitance between a sampling configuration and a charge sharing configuration. The input signal sampling capacitance is realized with first and second differential input sampling capacitors, and the reference signal sampling capacitance is realized with first and second differential reference signal capacitors. Clocks change the switched capacitor front end between the sampling configuration and the charge sharing configuration. The comparator network is set at a preselected voltage threshold by setting a ratio of the reference sampling capacitance to the input sampling capacitance equal to a ratio of the preselected threshold voltage to a reference voltage.

Abstract: An image sensor that has one or more pixels within a pixel array. The pixel array may be coupled to a control circuit and one or more subtraction circuits. The control circuit may cause each pixel to provide a first reference output signal and a reset output signal. The control circuit may then cause each pixel to provide a light response output signal and a second reference output signal. The light response output signal corresponds to the image that is to be captured by the sensor. The subtraction circuit may provide a difference between the reset output signal and the first reference output signal to create a noise signal that is stored in memory. The subtraction circuit may also provide a difference between the second reference output signal and the light response output signal to create a normalized light response output signal. The noise signal may then be subtracted from the normalized light response output signal to generate the output data of the sensor.

Abstract: A mobile communication device (100) having image capture function and provided with a button to activate image capture and transmission. The button may be a specially provided button (80). Alternatively, the button may be one of the alphanumeric buttons (60) configured to activate image capture and transmission, the configuration being through pressing a specially provided button (80). An alternative mobile communication device (200) having image capture function activates image capture and transmission by pressing two buttons in succession.

Abstract: A transconductance circuit having a high output impedance has a dual input differential transconductor (10) with first (14) and second (16) differential inputs and a differential output (18). The first differential input (14) is connected to receive a dc voltage (20). An inverting feedback path is connected between the second differential input (16) and the differential output (18). A differential difference amplifier (24) has a first input (26) connected to receive the dc voltage (20) and a second input (28) connected to the inverting feedback path. A variable resistor (22) is connected across the differential output (18). The output (30) of the differential difference amplifier (24) is connected to control the variable resistor (22) to minimize the output of the differential difference amplifier (24), thereby creating a high output impedance from said transconductor (10).

Abstract: A transconductance circuit having a high output impedance has a dual input differential transconductor (10) with first (14) and second (16) differential inputs and a differential output (18). The first differential input (14) is connected to receive a dc voltage (20). An inverting feedback path is connected between the second differential input (16) and the differential output (18). A differential difference amplifier (24) has a first input (26) connected to receive the dc voltage (20) and a second input (28) connected to the inverting feedback path. A variable resistor (22) is connected across the differential output (18). The output (30) of the differential difference amplifier (24) is connected to control the variable resistor (22) to minimize the output of the differential difference amplifier (24), thereby creating a high output impedance from said transconductor (10).

Abstract: A method of generating a lens position detection signal for optical disc apparatus. The signal is generated in a way which provides continuous position information. The signal is also independent of changes in reflectivity on the surface of the optical disc. Moreover, the signal can be calibrated for DC offset due to misalignment and changes in photo-detector output.

Abstract: The track counter circuit of the present invention is for counting tracks. The circuit indicates a circuit for generating a first signal indicating a first track has been crossed and a second signal indicating a second track has been crossed after the first track, a circuit for determining when a third track should have been crossed and generating a missing signal to indicate the third track, a circuit for determining a valid track period based on the first signal and the second signal, and a circuit for maintaining the valid track period when said missing signal is generated. The track counter circuit for counting tracks may use the first signal as a MIRR signal. Additionally, the second signal may be a MIRR signal.