Patents by Inventor Hirak Mitra

Hirak Mitra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10743722
    Abstract: A container holds an absorbent pad which contains fluids for cleansing toilet facilities before using them, or for cleansing or moisturizing a person's body after using a toilet. One carries one or more such containers on one's person. To use the container one opens it and expresses fluid from the pad onto dry clean toilet paper by pressing that toilet paper onto the pad. One then uses the now moist toilet paper to clean a toilet seat, or to clean or moisturize one's person or the person of another. Then one disposes of the now used toilet paper as one normally disposes of toilet paper.
    Type: Grant
    Filed: July 13, 2015
    Date of Patent: August 18, 2020
    Inventors: Hirak Mitra, Donald C. Lewis
  • Publication number: 20190282039
    Abstract: A container holds an absorbent pad which contains fluids for cleansing toilet facilities before using them, or for cleansing or moisturizing a person's body after using a toilet. One carries one or more such containers on one's person. To use the container one opens it and expresses fluid from the pad onto dry clean toilet paper by pressing that toilet paper onto the pad. One then uses the now moist toilet paper to clean a toilet seat, or to clean or moisturize one's person or the person of another. Then one disposes of the now used toilet paper as one normally disposes of toilet paper.
    Type: Application
    Filed: March 15, 2018
    Publication date: September 19, 2019
    Inventors: Donald C. Lewis, Hirak Mitra
  • Publication number: 20180085164
    Abstract: A machine holds a plurality of RF beam generators which all point at a particular location. A patient with a target volume of tissue to be treated by heat is held immobile such that the target is located at the point all the RF beams traverse. The RF beams traverse that point and the resultant generated heat treats the target. No two or more RF beams traverse any other location in the patient's body. Since each individual RF beam is too weak to cause damage, the non-targeted tissues of the patient are unharmed.
    Type: Application
    Filed: September 25, 2016
    Publication date: March 29, 2018
    Inventors: Hirak Mitra, Donald Carson Lewis
  • Publication number: 20180014871
    Abstract: A machine holds a plurality of RF beam generators which all point at a particular location. A patient with a target volume of tissue to be treated by heat is held immobile such that the target is located at the point all the RF beams traverse. The RF beams traverse that point and the resultant generated heat treats the target. No two or more RF beams traverse any other location in the patient's body. Since each individual RF beam is too weak to cause damage, the non-targeted tissues of the patient are unharmed.
    Type: Application
    Filed: July 12, 2016
    Publication date: January 18, 2018
    Inventors: Hirak Mitra, Donald Carson Lewis
  • Publication number: 20170015482
    Abstract: A container holds an absorbent pad which contains fluids for cleansing toilet facilities before using them, or for cleansing or moisturizing a person's body after using a toilet. One carries one or more such containers on one's person. To use the container one opens it and expresses fluid from the pad onto dry clean toilet paper by pressing that toilet paper onto the pad. One then uses the now moist toilet paper to clean a toilet seat, or to clean or moisturize one's person or the person of another. Then one disposes of the now used toilet paper as one normally disposes of toilet paper.
    Type: Application
    Filed: July 13, 2015
    Publication date: January 19, 2017
    Inventors: Donald C. Lewis, Hirak Mitra
  • Patent number: 9214583
    Abstract: The present disclosure provides a means to build a solar cell that is transparent to and polarizes visible light, and to transfer the energy thus generated to electrical power wires.
    Type: Grant
    Filed: March 16, 2011
    Date of Patent: December 15, 2015
    Inventors: Hirak Mitra, Karen Ann Reinhardt
  • Publication number: 20130233735
    Abstract: A case that stores one or more paintbrushes in manner to prevent paint in them from drying out, so that there is no need to clean those brushes between uses; moreover the case containing a pump evacuator to remove air from the case when it is closed, thus further retarding the drying of the brushes inside; and finally the case holding paint drying retardant that evanesces into the atmosphere inside the case, further slowing down the drying of the brushes inside.
    Type: Application
    Filed: March 6, 2013
    Publication date: September 12, 2013
    Inventors: James Steven Hurley, Hirak Mitra, Donald Carson Lewis
  • Publication number: 20120180237
    Abstract: This system and invention enables a commercial painter to comb-clean and to wash a paintbrush with the same apparatus; and also to clean roller paintbrushes; and then to use that apparatus to clean itself; and to provide convenient ways for the painter to carry and to store this tool.
    Type: Application
    Filed: January 15, 2012
    Publication date: July 19, 2012
    Inventors: Jorge Mejia, Hirak Mitra, Donald Carson Lewis, Nicholas Brawne
  • Patent number: 8156313
    Abstract: In an embodiment, the present invention discloses a flexible and reconfigurable architecture with efficient memory data management, together with efficient data transfer and relieving data transfer congestion in an integrated circuit. In an embodiment, the output of a first functional component is stored to an input memory of a next functional component. Thus when the first functional component completes its processing, its output is ready to be accessed as input to the next functional component. In an embodiment, the memory device further comprises a partition mechanism for simultaneously accepting output writing from the first functional component and accepting input reading from the second functional component. In another embodiment, the present integrated circuit comprises at least two functional components and at least two memory devices, together with a controller for switching the connections between the functional components and the memory devices.
    Type: Grant
    Filed: June 29, 2008
    Date of Patent: April 10, 2012
    Assignee: Navosha Corporation
    Inventors: Hirak Mitra, Raj Kulkarni, Richard Wicks, Michael Moon
  • Publication number: 20120070934
    Abstract: The present disclosure provides a means to build a solar cell that is transparent to and polarizes visible light, and to transfer the energy thus generated to electrical power wires.
    Type: Application
    Filed: March 16, 2011
    Publication date: March 22, 2012
    Inventors: Hirak Mitra, Karen Ann Reinhardt
  • Patent number: 8103855
    Abstract: The present disclosure provides a methodology for reducing congestion of a processing unit, preferably by configuring a plurality of functional blocks to run in parallel or in series without the influence or input from the processing unit. In an embodiment, the present method chains a plurality of functional blocks together by software so that one functional block starts after the completion of another functional block. The configuration of the chain can be series, parallel, and any combination thereof, arranged to meet the circuit's objective. The chaining can be configured and re-configured, preferably by software input. The chaining can also be performed at design time or at run time. The chaining can also be modified, preferably at design time, but can also be modified at run time.
    Type: Grant
    Filed: June 29, 2008
    Date of Patent: January 24, 2012
    Assignee: Navosha Corporation
    Inventors: Hirak Mitra, Raj Kulkarni, Richard Wicks, Michael Moon
  • Patent number: 7870366
    Abstract: The present disclosure provides an architecture that enables massive parallel processing on an IC while alleviating control congestion, memory access congestion and wiring congestion, together with high flexibility where the processing units are soft-arranged to perform different tasks. In an embodiment, the present architecture includes a functional block with a GO component to start the functional block, and a DONE component to identifying the completion status. The GO and DONE components can be linked together, preferably by a linkage component, to chain the functional blocks. The linkage is preferably soft configurable. In another embodiment, the present architecture includes an integrated circuit comprises a plurality of functional blocks chained together for serial processing, parallel processing, or any combination thereof.
    Type: Grant
    Filed: June 29, 2008
    Date of Patent: January 11, 2011
    Inventors: Hirak Mitra, Raj Kulkarni, Richard Wicks, Michael Moon
  • Publication number: 20100287244
    Abstract: Methods and apparatuses for establishing a trusted group of users to prevent undesirable communication by employing authenticated contact information. In an embodiment, the present invention embeds authenticated contact information to data communication composed by members of the trusted group. Authenticated contact information is preferably disposable contact information, changeable as desired, at a regular interval, or one-time contact information. In another embodiment, the present invention discloses a process of expanding an existing trusted group of users to an outsider, comprising embedding authenticated contact information of a member within the trusted group to a data communication composed by the outsider to a member of the trusted group.
    Type: Application
    Filed: May 11, 2009
    Publication date: November 11, 2010
    Applicant: NAVOSHA CORPORATION
    Inventors: Richard Wicks, Hirak Mitra, Michael Moon
  • Patent number: 7822897
    Abstract: The present invention relates to a flexible and reconfigurable bus fabric for microelectronic processing units, which can offer efficient memory data management, together with efficient data transfer and relieving data transfer congestion in an integrated circuit. In an embodiment, the present reconfigurable bus fabric comprises a multistate intersection between two data buses. Preferably, the multistate intersection comprises at least two states, a connecting state connecting the two data buses, and a disconnecting state disconnecting the two data buses. The multistate intersection provides a reconfigurable bus fabric, allowing different connection configuration for the data buses. This reconfigurable bus fabric offers soft-configurability and soft-reconfigurability, using software programming to arrange the circuits' interconnections. Other configurations are also disclosed in exemplary embodiments.
    Type: Grant
    Filed: June 29, 2008
    Date of Patent: October 26, 2010
    Inventors: Hirak Mitra, Raj Kulkarni, Richard Wicks, Michael Moon
  • Publication number: 20090083461
    Abstract: The present disclosure provides a methodology for reducing congestion of a processing unit, preferably by configuring a plurality of functional blocks to run in parallel or in series without the influence or input from the processing unit. In an embodiment, the present method chains a plurality of functional blocks together by software so that one functional block starts after the completion of another functional block. The configuration of the chain can be series, parallel, and any combination thereof, arranged to meet the circuit's objective. The chaining can be configured and re-configured, preferably by software input. The chaining can also be performed at design time or at run time. The chaining can also be modified, preferably at design time, but can also be modified at run time.
    Type: Application
    Filed: June 29, 2008
    Publication date: March 26, 2009
    Inventors: Hirak Mitra, Raj Kulkarni, Richard Wicks, Michael Moon
  • Publication number: 20090079466
    Abstract: The present disclosure provides an architecture that enables massive parallel processing on an IC while alleviating control congestion, memory access congestion and wiring congestion, together with high flexibility where the processing units are soft-arranged to perform different tasks. In an embodiment, the present architecture includes a functional block with a GO component to start the functional block, and a DONE component to identifying the completion status. The GO and DONE components can be linked together, preferably by a linkage component, to chain the functional blocks. The linkage is preferably soft configurable. In another embodiment, the present architecture includes an integrated circuit comprises a plurality of functional blocks chained together for serial processing, parallel processing, or any combination thereof.
    Type: Application
    Filed: June 29, 2008
    Publication date: March 26, 2009
    Inventors: Hirak Mitra, Raj Kulkarni, Richard Wicks, Michael Moon
  • Publication number: 20090083515
    Abstract: In an embodiment, the present invention discloses a flexible and reconfigurable architecture with efficient memory data management, together with efficient data transfer and relieving data transfer congestion in an integrated circuit. In an embodiment, the output of a first functional component is stored to an input memory of a next functional component. Thus when the first functional component completes its processing, its output is ready to be accessed as input to the next functional component. In an embodiment, the memory device further comprises a partition mechanism for simultaneously accepting output writing from the first functional component and accepting input reading from the second functional component. In another embodiment, the present integrated circuit comprises at least two functional components and at least two memory devices, together with a controller for switching the connections between the functional components and the memory devices.
    Type: Application
    Filed: June 29, 2008
    Publication date: March 26, 2009
    Inventors: Hirak Mitra, Raj Kulkarni, Richard Wicks, Michael Moon
  • Publication number: 20090083460
    Abstract: The present invention relates to a flexible and reconfigurable bus fabric for microelectronic processing units, which can offer efficient memory data management, together with efficient data transfer and relieving data transfer congestion in an integrated circuit. In an embodiment, the present reconfigurable bus fabric comprises a multistate intersection between two data buses. Preferably, the multistate intersection comprises at least two states, a connecting state connecting the two data buses, and a disconnecting state disconnecting the two data buses. The multistate intersection provides a reconfigurable bus fabric, allowing different connection configuration for the data buses. This reconfigurable bus fabric offers soft-configurability and soft-reconfigurability, using software programming to arrange the circuits' interconnections. Other configurations are also disclosed in exemplary embodiments.
    Type: Application
    Filed: June 29, 2008
    Publication date: March 26, 2009
    Inventors: Hirak Mitra, Raj Kulkarni, Richard Wicks, Michael Moon
  • Patent number: 6744697
    Abstract: SYNC parsing for Cable Modem Clock Synchronization is implemented using software processing with hardware assist in a manner that achieves the cost benefits of software SYNC parsing with the time accuracy of hardware SYNC parsing. Hardware scans for the arrival of new MPEG frames. Whenever any MPEG frame arrives, the MPEG frame is processed to extract MAC packets. If a SYNC packet is discovered during this processing, the software determines the SYNC arrival time, a comparison is made between the time the SYNC arrival time and the SYNC time value, and the software uses the difference to adjust the Cable Modem clock. Implementation variations include different approaches to when timestamps are recorded, the calculation of the SYNC arrival time, the use of software to process the MPEG frame and MAC packets, and the use of software to perform the time comparison.
    Type: Grant
    Filed: April 24, 2001
    Date of Patent: June 1, 2004
    Assignee: Juniper Networks, Inc.
    Inventors: Hirak Mitra, David Stark
  • Publication number: 20010053193
    Abstract: SYNC parsing for Cable Modem Clock Synchronization is implemented using software processing with hardware assist in a manner that achieves the cost benefits of software SYNC parsing with the time accuracy of hardware SYNC parsing. Hardware scans for the arrival of new MPEG frames. Whenever any MPEG frame arrives, the NPEG frame is processed to extract MAC packets. If a SYNC packet is discovered during this processing, the software determines the SYNC arrival time, a comparison is made between the time the SYNC arrival time and the SYNC time value, and the software uses the difference to adjust the Cable Modem clock. Implementation variations include different approaches to when timestamps are recorded, the calculation of the SYNC arrival time, the use of software to process the MPEG frame and MAC packets, and the use of software to perform the time comparison.
    Type: Application
    Filed: April 24, 2001
    Publication date: December 20, 2001
    Inventors: Hirak Mitra, David Stark