Patents by Inventor Hirayama HIDEO

Hirayama HIDEO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11121156
    Abstract: An array substrate includes first and second thin-film transistors formed on a base and spaced by a predetermined distance in a first direction that is parallel to the plane on which the base is located and set in parallel. The first thin-film transistor includes a first active layer, a first gate insulation layer, a first gate electrode, a first interlayer insulation layer, and first source/drain electrodes sequentially stacked on the base in a third direction that is perpendicular to the first direction. The first source/drain electrodes are electrically connected to the first active layer. The second thin-film transistor includes a second gate electrode, a second gate insulation layer, second source/drain electrodes, and a second active layer sequentially stacked on the base in the third direction. The first active layer and the first gate electrode are both formed of a poly-silicon material. The second active layer includes an oxide semiconductor material.
    Type: Grant
    Filed: January 24, 2018
    Date of Patent: September 14, 2021
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Hirayama Hideo
  • Patent number: 10998342
    Abstract: An array substrate and a manufacturing method thereof are provided. The array substrate includes a first thin-film transistor and a second thin-film transistor formed on a base and spaced from each other by a predetermined distance and set in parallel. The first thin-film transistor includes, sequentially stacked on the base, a first active layer, a first gate insulation layer, a first gate electrode, an interlayer insulation layer, and first source/drain electrodes. The first source/drain electrodes are electrically connected with the first active layer. The second thin-film transistors includes, sequentially stacked on the base, a second gate electrode, a second gate insulation layer, a second active layer, an etch stop layer, and second source/drain electrodes. The first active layer and the second gate electrode are both formed of a poly-silicon material. The first gate electrode and the second active layer are both formed of an oxide semiconductor material.
    Type: Grant
    Filed: January 24, 2018
    Date of Patent: May 4, 2021
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Hirayama Hideo
  • Patent number: 10896933
    Abstract: Disclosed are a display panel and a manufacturing method thereof. A display area of the display panel has a display area includes a plurality of pixel units arranged in an array. Each of the pixel units includes a plurality of sub pixel units of different colors. The display device includes, in the display area, at least one driving circuit arranged between two adjacent rows of the pixel units. The driving circuit includes a plurality of sub driving circuits. Each of the sub pixels is connected through one signal conductor line to the sub driving circuits. The sub driving circuits transmit an image driving signal through the signal conductor lines to the sub pixel units to drive the sub pixel units to display an image.
    Type: Grant
    Filed: January 24, 2018
    Date of Patent: January 19, 2021
    Assignees: WUHAN CHINA STAR OPTOELECTRONICS, TECHNOLOGY CO., LTD.
    Inventors: Hirayama Hideo, Hajime Nagai
  • Publication number: 20200295052
    Abstract: An array substrate and a manufacturing method thereof are provided. The array substrate includes a first thin-film transistor and a second thin-film transistor formed on a base and spaced from each other by a predetermined distance and set in parallel. The first thin-film transistor includes, sequentially stacked on the base, a first active layer, a first gate insulation layer, a first gate electrode, an interlayer insulation layer, and first source/drain electrodes. The first source/drain electrodes are electrically connected with the first active layer. The second thin-film transistors includes, sequentially stacked on the base, a second gate electrode, a second gate insulation layer, a second active layer, an etch stop layer, and second source/drain electrodes. The first active layer and the second gate electrode are both formed of a poly-silicon material. The first gate electrode and the second active layer are both formed of an oxide semiconductor material.
    Type: Application
    Filed: January 24, 2018
    Publication date: September 17, 2020
    Applicant: Wuhan China Star Optoelectronics Technology Co., Ltd.
    Inventor: Hirayama HIDEO
  • Publication number: 20200295094
    Abstract: Disclosed are a display panel and a manufacturing method thereof. A display area of the display panel has a display area includes a plurality of pixel units arranged in an array. Each of the pixel units includes a plurality of sub pixel units of different colors. The display device includes, in the display area, at least one driving circuit arranged between two adjacent rows of the pixel units. The driving circuit includes a plurality of sub driving circuits. Each of the sub pixels is connected through one signal conductor line to the sub driving circuits. The sub driving circuits transmit an image driving signal through the signal conductor lines to the sub pixel units to drive the sub pixel units to display an image.
    Type: Application
    Filed: January 24, 2018
    Publication date: September 17, 2020
    Applicant: Wuhan China Star Optoelectronics Technology Co., Ltd.
    Inventors: Hirayama HIDEO, HAJIME NAGAI
  • Publication number: 20200295056
    Abstract: An array substrate includes first and second thin-film transistors formed on a base and spaced by a predetermined distance in a first direction that is parallel to the plane on which the base is located and set in parallel. The first thin-film transistor includes a first active layer, a first gate insulation layer, a first gate electrode, a first interlayer insulation layer, and first source/drain electrodes sequentially stacked on the base in a third direction that is perpendicular to the first direction. The first source/drain electrodes are electrically connected to the first active layer. The second thin-film transistor includes a second gate electrode, a second gate insulation layer, second source/drain electrodes, and a second active layer sequentially stacked on the base in the third direction. The first active layer and the first gate electrode are both formed of a poly-silicon material. The second active layer includes an oxide semiconductor material.
    Type: Application
    Filed: January 24, 2018
    Publication date: September 17, 2020
    Applicant: Wuhan China Star Optoelectronics Technology Co., Ltd.
    Inventor: Hirayama HIDEO
  • Patent number: 10203823
    Abstract: The present disclosure relates to a built-in touch display panel basing on OLED includes: a thin film transistor (TFT) layer, an anode layer, an OLED layer, and a cathode layer are configured along a bottom-to-up direction; and the cathode layer includes a plurality of first cathode blocks and the second cathode blocks, wherein the first cathode blocks and the second cathode blocks are interleaved with each other along a horizontal direction and along a vertical direction of the display panel, the adjacent first cathode blocks are electrically connected, and the adjacent second cathode blocks are electrically connected. In this way, the built-in touch display panel basing on OLED may be obtained by simple manufacturing process having the low cost and high yield rate.
    Type: Grant
    Filed: January 7, 2017
    Date of Patent: February 12, 2019
    Assignee: Wuhan China Star Optoelectronics Technology Co., Ltd
    Inventors: Hirayama Hideo, Nagai Hajime
  • Publication number: 20180211998
    Abstract: The present disclosure relates to a built-in touch display panel basing on OLED includes: a thin film transistor (TFT) layer, an anode layer, an OLED layer, and a cathode layer are configured along a bottom-to-up direction; and the cathode layer includes a plurality of first cathode blocks and the second cathode blocks, wherein the first cathode blocks and the second cathode blocks are interleaved with each other along a horizontal direction and along a vertical direction of the display panel, the adjacent first cathode blocks are electrically connected, and the adjacent two cathode blocks are electrically connected. In this way, the built-in touch display panel basing on OLED may be obtained by simple manufacturing process having the low cost and high yield rate.
    Type: Application
    Filed: January 7, 2017
    Publication date: July 26, 2018
    Applicant: Wuhan China Star Optoelectronics Technology Co., L td.
    Inventors: Hirayama HIDEO, Nagai HAJIME