Patents by Inventor Hirayoshi Tanei

Hirayoshi Tanei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060234021
    Abstract: A multi-layer ceramic substrate having an in-plane shrinkage ratio of 1% or less with 0.1% or less of unevenness, inorganic particles remaining on the external electrodes being 20% or less by mass as a percentage of one or more metals constituting inorganic particles per the total amount of one or more metals constituting the external electrodes and one or more metals constituting the inorganic particles, is produced by (a) preparing a slurry containing ceramic material powder and an organic binder to form low-temperature-sinterable green substrate sheets, (b) laminating the green substrate sheets after forming electrodes thereon, to produce an unsintered multi-layer ceramic substrate, (c) bonding a constraining layer comprising inorganic particles, which are not sintered at the sintering temperature of the unsintered multi-layer ceramic substrate and have an average particle size of 0.3 ?m or more, 0.
    Type: Application
    Filed: October 15, 2004
    Publication date: October 19, 2006
    Inventors: Hirayoshi Tanei, Itaru Ueda, Koji Ichikawa, Hiroyuki Tsunematsu, Hatsuo Ikeda
  • Patent number: 6815073
    Abstract: The present invention has an object to enhance the reliability of the electrical connection of a silver-based conductor film on the surface of a glass ceramic board. In order to achieve the object, according to the present invention, by the use of a conductor paste containing a silver particle having a specific surface area of 0.3 m2/g to 3.0 m2/g and no glass, printing is carried out on a glass ceramic board and the conductor paste is fired at a firing temperature having a difference of ±50° C. from a softening temperature of amorphous borosilicate glass contained in the glass ceramic. Consequently, a silver-based conductor film having high reliability of the electrical connection is formed on the ceramic board.
    Type: Grant
    Filed: August 30, 2001
    Date of Patent: November 9, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Hirayoshi Tanei, Tsuyoshi Fujita, Masato Kirigaya, Yasuo Akutsu, Kaoru Uchiyama, Hiroshi Soma, Hiroatsu Tokuda
  • Patent number: 6707682
    Abstract: A low-EMI circuit which realizes a high mounting density by converting the potential fluctuation of a power supply layer with respect to a ground layer which occurs on switching an IC device etc., into Joule's heat in the substrate without using any parts as a countermeasure against the EMI. Its structure, a circuit board using it, and a method of manufacturing the circuit board are also disclosed. Parallel plate lines in which the Q-value of the stray capacitance between solid layers viewed from the power supply layer and ground layer is equivalently reduced and which are matchedly terminated by forming a structure in which a resistor (resistor layer) and another ground layer are provided in addition to the power supply layer and the ground layer on a multilayered circuit board. A closed shield structure is also disclosed.
    Type: Grant
    Filed: September 21, 2001
    Date of Patent: March 16, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Yutaka Akiba, Yasunori Narizuka, Hirayoshi Tanei, Naoya Kitamura
  • Publication number: 20020197488
    Abstract: The present invention has an object to enhance the reliability of the electrical connection of a silver-based conductor film on the surface of a glass ceramic board. In order to achieve the object, according to the present invention, by the use of a conductor paste containing a silver particle having a specific surface area of 0.3 m2/g to 3.0 m2/g and no glass, printing is carried out on a glass ceramic board and the conductor paste is fired at a firing temperature having a difference of ±50° C. from a softening temperature of amorphous borosilicate glass contained in the glass ceramic. Consequently, a silver-based conductor film having high reliability of the electrical connection is formed on the ceramic board.
    Type: Application
    Filed: August 30, 2001
    Publication date: December 26, 2002
    Inventors: Hirayoshi Tanei, Tsuyoshi Fujita, Masato Kirigaya, Yasuo Akutsu, Kaoru Uchiyama, Hiroshi Soma, Hiroatsu Tokuda
  • Patent number: 6353540
    Abstract: A low-EMI circuit which realizes a high mounting density by converting the potential fluctuation off a power supply layer with respect to a ground layer which occurs on switching an IC device etc., into Joule's heat in the substrate without using any parts as a countermeasure against the EMI. Its structure, a circuit board using it, and a method of manufacturing the circuit board are also disclosed. Parallel plate lines in which the Q-value of the stray capacitance between solid layers viewed from the power supply layer and ground layer is equivalently reduced and which are matchedly terminated by forming a structure in which a resistor (resistor layer) and another ground layer are provided in addition to the power supply layer and the ground layer on a multilayered circuit board. A closed shield structure is also disclosed.
    Type: Grant
    Filed: July 10, 1997
    Date of Patent: March 5, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Yutaka Akiba, Yasunori Narizuka, Hirayoshi Tanei, Naoya Kitamura
  • Publication number: 20020015293
    Abstract: A low-EMI circuit which realizes a high mounting density by converting the potential fluctuation of a power supply layer with respect to a ground layer which occurs on switching an IC device etc., into Joule's heat in the substrate without using any parts as a countermeasure against the EMI. Its structure, a circuit board using it, and a method of manufacturing the circuit board are also disclosed. Parallel plate lines in which the Q-value of the stray capacitance between solid layers viewed from the power supply layer and ground layer is equivalently reduced and which are matchedly terminated by forming a structure in which a resistor (resistor layer) and another ground layer are provided in addition to the power supply layer and the ground layer on a multilayered circuit board. A closed shield structure is also disclosed.
    Type: Application
    Filed: September 21, 2001
    Publication date: February 7, 2002
    Inventors: Yutaka Akiba, Yasunori Narizuka, Hirayoshi Tanei, Naoya Kitamura
  • Patent number: 6118671
    Abstract: Ceramic circuit substrate which is sintered at 900 to 1,050.degree. C. and have low relative dielectric constant, thermal expansion coefficient comparable to that of silicon, and high bending strength, and a method of manufacturing are provided by using a glass with a softening point of 850 to 1,100.degree. C., that is, a glass having a composition included in an area in FIG. 1 (triangular composition diagram of SiO.sub.2 --B.sub.2 O.sub.3 --R.sub.2 O, a composition is represented by the position of a small circle, the number in a small circle represents the composition number) defined with lines connecting points representing the first, third, tenth, eleventh, and fourth compositions respectively as raw material.
    Type: Grant
    Filed: June 24, 1998
    Date of Patent: September 12, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Hirayoshi Tanei, Shoichi Iwanaga, Masahide Okamoto, Masato Nakamura, Kousaku Morita, Shousaku Ishihara, Fumikazu Tagami, Norio Sengoku, Tsuyoshi Fujita, Fumiyuki Kobayashi
  • Patent number: 5825632
    Abstract: Ceramic circuit substrate which is sintered at 900.degree. to 1,050.degree. C. and have low relative dielectric constant, thermal expansion coefficient comparable to that of silicon, and high bending strength, and a method of manufacturing are provided by using a glass with a softening point of 850.degree. to 1,100.degree. C., that is, a glass having a composition included in an area in FIG. 1 (triangular composition diagram of SiO.sub.2 --B.sub.2 O.sub.3 --R.sub.2 O, a composition is represented by the position of a small circle, the number in a small circle represents the composition number) defined with lines connecting points representing the first, third, tenth, eleventh, and fourth compositions respectively as raw material.
    Type: Grant
    Filed: August 8, 1995
    Date of Patent: October 20, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Hirayoshi Tanei, Shoichi Iwanaga, Masahide Okamoto, Masato Nakamura, Kousaku Morita, Shousaku Ishihara, Fumiyuki Kobayashi, Fumikazu Tagami, Norio Sengoku, Tsuyoshi Fujita
  • Patent number: 5503787
    Abstract: According to this method for manufacturing a multilayer glass-ceramic circuit board, a green sheet laminate is fired in a non-oxidizing atmosphere in a first firing step so that a void content of at least 10% is maintained and strength of the ceramic laminate is increased. Then the laminate is fired in an oxidizing atmosphere in a second firing step so that the organic binder contained in the laminate is removed and the residual carbon content is at most 200 ppm. Thereafter the laminate is fired in a reducing atmosphere in a third firing step to reduce the oxidized conductor circuit. Finally, the laminate is fired in a non-oxidizing atmosphere in a fourth firing step to densify the ceramic laminate. The firing temperature in the first, second and third steps is 100.degree.-200.degree. C. lower than the softening point of the glass and the firing temperature in the fourth step is higher than the softening point of the glass and lower than the melting point of the conductor.
    Type: Grant
    Filed: March 9, 1994
    Date of Patent: April 2, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Hirayoshi Tanei, Shoichi Iwanaga, Shousaku Ishihara, Kousaku Morita
  • Patent number: 5494721
    Abstract: A substrate for a magnetic disc, which comprises a crystallized glass consisting essentially of an amorphous glass continuous phase and crystal particles dispersed in the continuous phase, the substrate having fine projections of the crystal particles on the surface thereof, a method of producing the substrate, the magnetic disc using the substrate, and a method of producing the magnetic disc are provided. The crystallized glass is made from a glass material of a Li.sub.2 O--SiO.sub.2, Li.sub.2 O--Al.sub.2 O.sub.3 --SiO.sub.2, Li.sub.2 O--MgO--Al.sub.2 O.sub.3 --SiO.sub.2, MgO--Al.sub.2 O.sub.3 --SiO.sub.2, Na.sub.2 O--Al.sub.2 O.sub.3 --SiO .sub.2 or BaO--Al.sub.2 O.sub.3 --SiO.sub.2 system, and the crystal particles have one or more compositions selected from Li.sub.2 O--SiO.sub.2, Li.sub.2 O.2SiO.sub.2, Li.sub.2 O.Al.sub.2 O.sub.3.2Si.sub.2, Li.sub.2 O.Al.sub.2 O.sub.3 4SiO.sub.2, SiO.sub.2 and 2MgO--2Al.sub.2 O.sub.3.5SiO.sub.2, and an average particle size of 0.01 to 3.0 .mu.
    Type: Grant
    Filed: August 26, 1993
    Date of Patent: February 27, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Nobuo Nakagawa, Hirayoshi Tanei
  • Patent number: 5396034
    Abstract: A ceramic thin film hybrid circuit board is provided by flattening the surface of a ceramic multi-layer interconnection substrate, forming capture pads on the flattened surface, filling spaces between the capture pads with an insulating layer composed of a glass material or an organic resin material, grinding the resultant surface until the capture pads are exposed to flatness, and laminating a plurality of thin film interconnection layers on the flattened surface. The ceramic thin film hybrid circuit board has an increased package density of mounted electronic parts such as LSIs and the like because failures of thin film interconnection layer generated owing to the roughness of the surface of the ceramic substrate, defects such as voids and the hollows produced with the capture pads are greatly reduced, and is very suitable for large scale electronic computers, in which the wiring length is reduced so as to reduce the signal delay.
    Type: Grant
    Filed: March 8, 1993
    Date of Patent: March 7, 1995
    Assignee: Hitachi
    Inventors: Tsuyoshi Fujita, Shoichi Iwanaga, Hirayoshi Tanei
  • Patent number: 5342674
    Abstract: A ceramic composition comprising 55-70 vol % of a borosilicate glass consisting of 65-88 wt % of SiO.sub.2, 5-25 wt % of B.sub.2 O.sub.3, 1-5 wt % of one or more of Li.sub.2 O, K.sub.2 O and Na.sub.2 O, and 0-5 wt % of Al.sub.2 O.sub.3, 5-30 vol % of alumina as filler, 5-35 vol % of cordierite and 0-20 vol % of quartz glass is provided for a ceramic circuit board for an electronic device such as an electronic computer.
    Type: Grant
    Filed: March 9, 1993
    Date of Patent: August 30, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Hirayoshi Tanei, Shoichi Iwanaga
  • Patent number: 5093173
    Abstract: A substrate for a magnetic disc, which comprises a crystallized glass consisting essentially of an amorphous glass continuous phase and crystal particles dispersed in the continuous phase, the substrate having fine projections of the crystal particles on the surface thereof, a method of producing the substrate, the magnetic disc using the substrate, and a method of producing the magnetic disc are provided. The crystallized glass is made from a glass material of a Li.sub.2 O-SiO.sub.2, Li.sub.2 O-Al.sub.2 O.sub.3 -SiO.sub.2, Li.sub.2 O-MgO-Al.sub.2 O.sub.3 -SiO.sub.2, MgO-Al.sub.2 O.sub.3 -SiO.sub.2, Na.sub.2 O-Al.sub.2 O.sub.3 -SiO.sub.2 or BaO-Al.sub.2 O.sub.3 -SiO.sub.2 system, and the crystal particles have one or more compositions selected from Li.sub.2 O.multidot.SiO.sub.2, Li.sub.2 O.multidot.2SiO.sub.2, Li.sub.2 O.multidot.Al.sub.2 O.sub.3 .multidot.2SiO.sub.2, Li.sub.2 O.multidot.Al.sub.2 O.sub.3 .multidot.4SiO.sub.2, SiO.sub.2 and 2MgO.multidot.2Al.sub.2 O.sub.3 .multidot.5SiO.sub.
    Type: Grant
    Filed: January 10, 1990
    Date of Patent: March 3, 1992
    Assignee: Hitachi, Ltd.
    Inventors: Nobuo Nakagawa, Hirayoshi Tanei
  • Patent number: 4715673
    Abstract: An optical switch having a small number of optical connections includes a substrate in which are provided a first light path for conducting optical signals and a second light path consisting of a photosensitive element and light emitting element in pairs. An optical fiber cable is interrupted by the substrate, and optical signals in the fiber cable are transmitted through the first light path or intervened by an electrical system through the second light path in response to the switching movement of the substrate.
    Type: Grant
    Filed: May 1, 1986
    Date of Patent: December 29, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Takanobu Noro, Yasumasa Koakutsu, Tamio Takeuchi, Masao Yano, Seiichi Onoda, Hideo Arima, Hitoshi Yokono, Hirayoshi Tanei
  • Patent number: 4547625
    Abstract: A method for manufacturing the insulating layers of a glass multilayer wiring board from a mixture of (1) 30-90 wt. % of a borosilicate glass consisting of 55-75 wt. % of SiO.sub.2, 13-25 wt. % of B.sub.2 O.sub.3, 5-13 wt. % of Al.sub.2 O.sub.3, each 1-5 wt. % of PbO, MgO, and BaO, and each 1-2 wt. % of Na.sub.2 O and K.sub.2 O and (2) 70-10 wt. % of a silica glass, is provided.
    Type: Grant
    Filed: July 7, 1983
    Date of Patent: October 15, 1985
    Assignee: Hitachi, Ltd.
    Inventors: Hiromi Tosaki, Hirayoshi Tanei, Akira Ikegami, Nobuyuki Sugishita
  • Patent number: 4481813
    Abstract: A dew sensor of direct current type and resistance-lowering type with increasing humidity for quick and sharp detection of dewing is provided, which comprises a pair of counterposed electrodes, humidity-sensitive layer of insulating porous metal oxide with a porosity of 20 to 60% provided on and between the counterposed electrodes, and an organic polymer coating layer having a thickness of 0.05 to 2 .mu.m provided on the humidity-sensitive layer.
    Type: Grant
    Filed: October 27, 1982
    Date of Patent: November 13, 1984
    Assignee: Hitachi, Ltd.
    Inventors: Hirayoshi Tanei, Shoichi Iwanaga, Akira Ikegami, Hiroshi Otsu, Hiromi Isonae
  • Patent number: 4386387
    Abstract: A porcelain composition comprising Pb(Fe.sub.2/3 W.sub.1/3)O.sub.3, PbTiO.sub.3 and Pb(Yb.sub.1/2 Nb.sub.1/2)O.sub.3 preferably within the range as defined by closed area of A-B-C-D-A in the accompanying triangular diagram can give a sintered product by sintering at a temperature as low as 1000.degree. C. or lower. The resulting sintered product has a high relative dielectric constant and a small dielectric loss tangent.
    Type: Grant
    Filed: November 16, 1981
    Date of Patent: May 31, 1983
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Hirayoshi Tanei, Akira Ikegami, Hideo Arima, Tokio Isogai, Kiyoshi Kawabata
  • Patent number: 4308571
    Abstract: A low temperature-sinterable dielectric composition is provided, whose sintered composition when prepared by firing a uniform mixture consisting of lead ferrotungstate, lead titanate and manganese dioxide at a temperature of not higher than 1,000.degree. C. has the general formula A.Pb(Fe.sub.2/3 W.sub.1/3).sub.1-x Ti.sub.x O.sub.3 +B.MnO.sub.2, wherein 0.005.ltoreq..times..ltoreq.0.65, A=0.95-0.9995, and B=0.0005-0.05, a relative dielectric constant of at least 2,000 at 25.degree. C., a dissipation factor (tan .delta.) of not more than 5% at 25.degree. C., and a specific resistance of at least 10.sup.9 .OMEGA..cm at 25.degree. C. Also provided is a thick film capacitor having a dielectric layer prepared from said composition.
    Type: Grant
    Filed: March 26, 1980
    Date of Patent: December 29, 1981
    Assignee: Hitachi, Ltd.
    Inventors: Hirayoshi Tanei, Akira Ikegami, Noriyuki Taguchi, Katsuo Abe, Hiroshi Ohtsu, Tokio Isogai