Abstract: Retinal prostheses are described with visual acuity better than 20/150, and higher sensitivity, dynamic range, and FOV than the state-of-the-art. At least two different techniques are presented, the first being an optically-switched vertical single-transistor amplifier for ultrahigh photocurrent amplification, and the second being nanopatterned pillar electrodes.

Abstract: High speed, and high timing resolution photon detecting systems and methods are presented with multiplication and self-quenching and self-recovering functions.

Abstract: The disclosed embodiments provide an apparatus for connecting one or more optical fibers to an optoelectronic system. This apparatus includes a packaged optoelectronic module (POeM) comprising an optical connector, a silicon photonic (SiP) chip, an integrated circuit (IC) chip, at least one laser chip and a package substrate. The apparatus also includes an assembly adapter enclosing the POeM, wherein the assembly adapter includes a mechanical transfer (MT) ferrule cavity, which includes one or more coarse-alignment structures to guide an MT ferrule enclosing at least one optical fiber during assembly of the apparatus. The assembly adapter is comprised of a solder-reflow-compatible material to facilitate bonding the assembly adapter to a circuit board.

Abstract: The disclosed embodiments provide an apparatus for connecting one or more optical fibers to an optoelectronic system. This apparatus includes a packaged optoelectronic module (POeM) comprising an optical connector, a silicon photonic (SiP) chip, an integrated circuit (IC) chip, at least one laser chip and a package substrate. The apparatus also includes an assembly adapter enclosing the POeM, wherein the assembly adapter includes a mechanical transfer (MT) ferrule cavity, which includes one or more coarse-alignment structures to guide an MT ferrule enclosing at least one optical fiber during assembly of the apparatus. The assembly adapter is comprised of a solder-reflow-compatible material to facilitate bonding the assembly adapter to a circuit board.

Abstract: The disclosed embodiments relate to an optoelectronic module, comprising one or more optical chips, and a molded substrate, which is molded around the one or more optical chips, so that the one or more optical chips are embedded in the molded substrate, and an active surface of each optical chip remains exposed. This molded substrate includes one or more through vias that provide electrical signal paths through the molded substrate. After the molded substrate is fabricated, one or more integrated circuit (IC) chips can be flip-mounted to the molded substrate and electrically connected to the one or more embedded optical chips and the one or more through vias. Also, one or more optical connectors containing optical waveguides can be flip-mounted on the molded substrate and optically coupled to the one or more embedded optical chips.

Abstract: The disclosed embodiments relate to a system for assembling an optical connector. During the assembly process, the system first fabricates the optical connector, wherein the optical connector is precut and includes a fiber coupler for connecting to an external optical fiber. Next, the system bonds the optical connector to a photonic chip, wherein the photonic chip includes an optical coupler, which is coupled to one or more optical components within the photonic chip. Finally, after the optical connector is bonded to the photonic chip, the system uses a laser to write a coupling waveguide in the optical connector, wherein the coupling waveguide is routed through the optical connector to connect the optical coupler in the photonic chip with the fiber coupler for connecting to the external optical fiber.

Abstract: An optical receiver includes: an active transimpedance amplifier (TIA) that converts a photocurrent from a photosensor into an active voltage signal; a high-speed amplifier that amplifies the active voltage signal to produce an amplified voltage signal that comprises an output for the optical receiver; and a reference-voltage-generation circuit that generates a reference voltage for the high-speed amplifier. This reference-voltage-generation circuit includes a dummy TIA that is identical to the active TIA, but does not receive a live input signal, and produces a dummy voltage signal. It also includes a low-speed amplifier which includes: an active input that receives the active voltage signal from the active TIA output; a dummy input that receives the dummy voltage signal from the dummy TIA output; and an output that controls directly or indirectly the reference voltage for the high-speed amplifier.

Abstract: A chip package includes an optical integrated circuit (such as a hybrid integrated circuit) and an integrated circuit that are proximate to each other in the chip package. The integrated circuit includes electrical circuits that modulate data, communicate data, and serialize/deserialize data, and the optical integrated circuit communicates optical signals with very high bandwidth. Moreover, a front surface of the integrated circuit is electrically coupled to a top surface of an interposer, and a top surface of the integrated circuit is electrically coupled to a front surface of the optical integrated circuit. Furthermore, a bottom surface of the optical integrated circuit faces the top surface of the interposer, and the front surface of the optical integrated circuit is optically coupled to an optical-fiber receptacle, which in turn is optically coupled to an optical-fiber connector.

Abstract: An integrated optical device includes an electro-absorption modulator disposed on a top surface of an optical waveguide. The electro-absorption modulator includes germanium disposed in a cavity between an n-type doped silicon sidewall and a p-type doped silicon sidewall. By applying a voltage between the n-type doped silicon sidewall and the p-type doped silicon sidewall, an electric field can be generated in a plane of the optical waveguide, but perpendicular to a propagation direction of the optical signal. This electric field shifts a band gap of the germanium, thereby modulating the optical signal.

Abstract: A chip package includes an optical integrated circuit (such as a hybrid integrated circuit) and an integrated circuit that are proximate to each other in the chip package. The integrated circuit includes electrical circuits that modulate data, communicate data, and serialize/deserialize data, and the optical integrated circuit communicates optical signals with very high bandwidth. Moreover, a front surface of the integrated circuit is electrically coupled to a top surface of an interposer, and a top surface of the integrated circuit is electrically coupled to a front surface of the optical integrated circuit. Furthermore, a bottom surface of the optical integrated circuit faces the top surface of the interposer, and the front surface of the optical integrated circuit is optically coupled to an optical-fiber receptacle, which in turn is optically coupled to an optical-fiber connector.

Abstract: A chip package includes an optical integrated circuit (such as a hybrid integrated circuit) and an integrated circuit that are proximate to each other in the chip package. The integrated circuit includes electrical circuits, such as memory or a processor, and the optical integrated circuit communicates optical signals with very high bandwidth. Moreover, a front surface of the integrated circuit is electrically coupled to a top surface of an interposer, and this top surface is in turn electrically coupled to a front surface of an input/output (I/O) integrated circuit that faces the top surface. Furthermore, the front surface of the I/O integrated circuit is electrically coupled to a top surface of the optical integrated circuit, where the top surface of the optical integrated circuit faces the front surface of the I/O integrated circuit.

Abstract: A chip package includes an optical integrated circuit (such as a hybrid integrated circuit) and an integrated circuit that are adjacent to each other on the same side of a substrate in the chip package. The integrated circuit includes electrical circuits, such as memory or a processor, and the optical integrated circuit communicates optical signals with very high bandwidth. In addition, an input/output (I/O) integrated circuit is coupled to the optical integrated circuit between the substrate and the optical integrated circuit. This I/O integrated circuit includes high-speed I/O circuits and energy-efficient driver and receiver circuits and communicates with optical devices on the optical integrated circuit. By integrating the optical integrated circuit, the integrated circuit and the I/O integrated circuit in close proximity, the chip package may facilitate improved performance compared to chip packages with electrical interconnects.

Abstract: A chip package includes an optical integrated circuit (such as a hybrid integrated circuit) and an integrated circuit that are adjacent to each in the chip package. The integrated circuit includes electrical circuits, such as memory or a processor, and the optical integrated circuit communicates optical signals with very high bandwidth. Moreover, a front surface of the integrated circuit is electrically coupled to a front surface of the optical integrated circuit by a top surface of the interposer, where the top surface faces the front surface of the integrated circuit and the front surface of the optical integrated circuit. Furthermore, the integrated circuit and the optical integrated circuit may be on a same side of the interposer. By integrating the optical integrated circuit and the integrated circuit in close proximity, the chip package may facilitate improved performance compared to chip packages with electrical interconnects.

Abstract: An integrated optical device includes an electro-absorption modulator disposed on a top surface of an optical waveguide. The electro-absorption modulator includes germanium disposed in a cavity between an n-type doped silicon sidewall and a p-type doped silicon sidewall. By applying a voltage between the n-type doped silicon sidewall and the p-type doped silicon sidewall, an electric field can be generated in a plane of the optical waveguide, but perpendicular to a propagation direction of the optical signal. This electric field shifts a band gap of the germanium, thereby modulating the optical signal.

Abstract: This chip package includes a substrate having a gold (or tin) layer disposed on a surface of the substrate. The gold (or tin) layer may couple to a tin (or gold) layer disposed on a surface of a second substrate. When melted, the gold layer and the tin layer result in an interconnect with a chemical composition having a subsequent melting temperature to reflow the bump that is higher than the initial melting temperature. For example, the chemical composition may correspond to a non-equilibrium gold-tin alloy.

Abstract: An integrated optical device includes an electro-absorption modulator disposed on a top surface of an optical waveguide. The electro-absorption modulator includes germanium disposed in a cavity between an n-type doped silicon sidewall and a p-type doped silicon sidewall. By applying a voltage between the n-type doped silicon sidewall and the p-type doped silicon sidewall, an electric field can be generated in a plane of the optical waveguide, but perpendicular to a propagation direction of the optical signal. This electric field shifts a band gap of the germanium, thereby modulating the optical signal.

Abstract: During a fabrication technique, trenches are defined partially through the thickness of a substrate. Then, photonic integrated circuits are coupled to the substrate. These photonic integrated circuits may be in a diving-board configuration, so that they at least partially overlap the trenches. While this may preclude the use of existing dicing techniques, individual hybrid integrated photonic chips (which each include a portion of the substrate and at least one of the photonic integrated circuits) may be singulated from the substrate by: coupling a carrier to a front surface of the substrate; thinning the substrate from a back surface until the partial trenches are reached (for example, by grinding the substrate); attaching a support mechanism (such as tape) to the back surface of the substrate; removing the carrier; and then removing the support mechanism.

Abstract: An integrated optical device includes an electro-absorption modulator disposed on a top surface of an optical waveguide. The electro-absorption modulator includes germanium disposed in a cavity between an n-type doped silicon sidewall and a p-type doped silicon sidewall. By applying a voltage between the n-type doped silicon sidewall and the p-type doped silicon sidewall, an electric field can be generated in a plane of the optical waveguide, but perpendicular to a propagation direction of the optical signal. This electric field shifts a band gap of the germanium, thereby modulating the optical signal.

Abstract: This chip package includes a substrate having a multilayer electroplated stack disposed on a surface of the substrate. The multilayer electroplated stack may include one or more instances of alternating layers of gold and tin, where relative thicknesses of the alternating layers, when melted, result in a chemical composition having an initial melting temperature to form a bump and a subsequent melting temperature to reflow the bump that is higher than the initial melting temperature. For example, the chemical composition may correspond to a non-equilibrium gold-tin alloy.

Abstract: A chip package is described which includes a first chip having a first surface and first sides having a first side-wall angle, and a second chip having a second surface and second sides having a second side-wall angle, which faces and is mechanically coupled to the first chip. The chip package is fabricated using a batch process, and the chips in the chip package were singulated from their respective wafers after the chip package is assembled. This is accomplished by etching the first and second side-wall angles and thinning the wafer thicknesses prior to assembling the chip package. For example, the first and/or the second side walls can be fabricated using wet etching or dry etching. Therefore, the first and/or the second side-wall angles may be other than vertical or approximately vertical.