Patents by Inventor Hiro Yonemasu

Hiro Yonemasu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Methods of making a low capacitance integrated circuit package
    Patent number: 4982494
    Abstract: An integrated circuit package utilizing low temperature sealing glass and having reduced lead capacitance. Voids in the glass material on the base substrate and the cap substrate result in the formation of glass-free cavities when the base substrate is fused to the cap substrate. A lead frame extending from and passing through the glass material which couples the base substrate to the cap substrate also passes through the glass-free cavities, resulting in a reduced parasitic capacitance of the package leads.
    Type: Grant
    Filed: January 31, 1990
    Date of Patent: January 8, 1991
    Assignee: Kyocera America, Inc.
    Inventors: Hiro Yonemasu, Kiyohide Shirai, Ikunosuke Kawamura
  • Low capacitance integrated circuit package
    Patent number: 4931854
    Abstract: An integrated circuit package utilizing low temperature sealing glass and having reduced lead capacitance. Voids in the glass material on the base substrate and the cap substrate result in the formation of glass-free cavities when the base substrate is fused to the cap substrate. A lead frame extending from and passing through the glass material which couples the base substrate to the cap substrate also passes through the glass-free cavities, resulting in a reduced parasitic capacitance of the package leads.
    Type: Grant
    Filed: February 6, 1989
    Date of Patent: June 5, 1990
    Assignee: Kyocera America, Inc.
    Inventors: Hiro Yonemasu, Kiyohide Shirai, Ikunosuke Kawamura