Abstract: A wireless communication device includes: a transmitting circuit that is connected to an antenna and includes a power amplifier that amplifies an input signal; a receiving circuit that is connected to the antenna and includes a switch that switches as to whether or not a signal is received; and a processor that executes a process including: acquiring timing information that indicates timing of a guard period when no signal is transmitted or received by the antenna; turning on the power amplifier and turning on the switch in the guard period based on the acquired timing information to input a noise signal of the transmitting circuit that is amplified by the power amplifier to the receiving circuit; measuring electrical power of a signal that is output from the receiving circuit in the guard period; and determining abnormality of the receiving circuit based on the measured electrical power.

Abstract: A switching system using laser induced discharge is provided which is capable of reliable switching with a simple structure, multiple switching for a number of circuits, good synchronization and no switching time delay among circuits. In the switching system for controlling conduction between electrodes of a switch by discharge between the electrodes, a laser beam is applied to one of the electrodes to make discharge from the other of the electrodes be induced by the laser beam and application of the laser beam is controlled to switch the conduction.

Abstract: A switching system using laser induced discharge is provided which is capable of reliable switching with a simple structure, multiple switching for a number of circuits, good synchronization and no switching time delay among circuits. In the switching system for controlling conduction between electrodes of a switch by discharge between the electrodes, a laser beam is applied to one of the electrodes to make discharge from the other of the electrodes be induced by the laser beam and application of the laser beam is controlled to switch the conduction.

Abstract: A sabot separator includes a sabot separation cylinder equipped with a pair of rail electrodes extending axially and connected with a muzzle end of a barrel of a projectile accelerator. An electrical power source is connected between the rail electrodes and applies a voltage to the rail electrodes for producing a force in a direction for decelerating the accelerating sabot. When the sabot enters the sabot separation cylinder, an electric current flows through the sabot and the sabot is suddenly stopped by a braking force resulting from the flow of the electric current.

Abstract: A bidirectional first-in first-out buffer device including on a single chip a single bank FIFO memory array, two bidirectional input/output ports, an input multiplexer for selecting which port to input data from, an output multiplexer for selecting which port to output data to, a byte/word converter for converting input data from a byte format to a word format, a word/byte converter for converting output data from a word format to a byte format, a parity generator/checker for generating parity output signals or confirming parity input signals, a flag generator for generating empty/full and half full flags, and control logic for controlling the direction, format and timing of data flow. The device is packaged in a 52-pin plastic leaded chip carrier package.

Abstract: A latch ram including on a single chip a memory array, a multiplexed address and data bus for the input of address information and the input/output of data information on the same lines, an address latch and associated row and column decoders for addressing particular locations within the memory array, data I/O and associated column I/O circuitry for inputting data to and outputting data from the memory array, and microprocessor-controlled logic for controlling the input and output of such data. The device is packaged in a 28-pin SOG or TSOP package.