Abstract: A substrate and semiconductor chips are connected by solder bumps and a vacant space around the solder bumps is coated with resin in such a degree that the tops of the semiconductor chips are not coated therewith. Epoxy resin or a resin having a smaller thermal expansion coefficient than the epoxy resin is used in the resin coating, and an inorganic material having a smaller thermal expansion coefficient than said resin is mixed therein.

Abstract: Disclosed is a semiconductor device constructed such that among elements forming a brazing material for bonding an electrode on a semiconductor substrate to an external electrode, the amounts of those elements which react with the material of the electrode or external electrode and form a compound harder and more brittle than the electrode material are smaller on the portion coming into contact with the electrode or external electrode than at the other portions.

Abstract: A heat-conducting cooling module for cooling a semiconductor substrate in an integrated circuit package assembly in which a semiconductor substrate is mounted on a base board by small solder pellets, and which contains a single substrate or laminated substrates. A heat-conducting relay member is provided between the semiconductor substrate and a housing so as to be pressed onto the semiconductor substrate. At least either one of the housing or the heat-conducting relay member is made of a sintered product which includes silicon carbide as a chief component.

Abstract: In an insulated type semiconductor device, a metal member is disposed between an insulating member and a circuit element which includes a semiconductor substrate. The metal member is a composite metal member having at least two different kinds of metal layers bonded to each other. In a preferred embodiment, in order to reduce undesirable effects caused by differences in the thermal coefficients .alpha..sub.I and .alpha..sub.S of the insulating member and the semiconductor substrate, respectively, the thermal expansion coefficient of said composite metal member as a whole .alpha..sub.M is adjusted in a range between .alpha..sub.I and .alpha..sub.S.

Abstract: A display panel includes a pair of substrates arranged face to face with each other with a predetermined gap therebetween, at least a pair of electrodes each provided on a corresponding one of facing surfaces of the substrates, and a display substance provided between the electrodes. A picture element is made up of a pair of facing portions of the electrodes and a portion of the display substance situated between the facing portions. At least one of the electrodes is made up of a multiplicity of picture element electrodes formed of a transparent conductive film and juxtaposed to each other and a contact metal member for substantially making an electrical connection of a plurality of ones of the picture element electrodes. The contact metal member is made up of a first layer made of chromium or a chromium alloy and a second layer formed on the first layer and made of nickel or gold.

Abstract: A semiconductor device is disclosed which is provided with at least one flexible conducting film having an inner electrode portion and an outer electrode portion. The inner electrode portion is conductively bonded to at least one of two kinds of electrode films formed on one main surface of a semiconductor substrate, and has a form similar to the shape of the electrode film. The outer electrode portion is integrated with the inner electrode portion into one body but is not bonded to the electrode film. The conducting film can be previously bonded to a transparent insulating film, if desired, and is arranged in registry with the electrode film on the semiconductor substrate, while being supported by the insulating film. Accordingly, the inner electrode portion of the conducting film is bonded to the electrode film having a complicated pattern, readily and accurately. The inner electrode portion serves to reduce the electric resistance of the electrode film and to increase the current capacity of the electrode.

Abstract: A semiconductor device is provided having a semiconductor substrate which has an annular moat formed in one major surface thereof and includes a pn junction terminating at an inner inclined side surface of the moat. In order to provide a high blocking voltage of the pn junction, the moat is filled or coated with glass material having a surface charge capable of inducing, in a semiconductor layer of one conductivity type in contact with the bottom of the moat, carriers having a polarity opposite to the above-mentioned conductivity type. An annular, highly-doped channel stopper region of the above-mentioned conductivity type is provided at the outside of the moat in a manner to be kept in contact with the moat, and the depth of the channel stopper region from the major surface is preferably made greater than the depth of the pn junction from the major surface.

Abstract: A liquid crystal display device comprising two substrates being provided in parallel to each other at a given distance and each having a Nesa film on the counterposed surface, at least one of the substrates being transparent, and a liquid crystal being filled between the substrates, the counterposed surfaces of the substrates each being coated with polymer of organosilicone compound having groups reacting with the substrates to a thickness of 300-1,500 .ANG. as an alignment film. The device has thick alignment films and good electrooptical characteristics.

Abstract: A method of manufacturing a semiconductor device of the type wherein aluminum layers are selectively deposited on a major surface of a silicon semiconductor substrate and thereafter aluminum is selectively diffused into the silicon semiconductor substrate by means of heat treatment. SiO.sub.2 mask is selectively formed on at least one major surface of the silicon semiconductor substrate, then aluminum is deposited onto the major surface being close to but separated from the SiO.sub.2 mask, subsequently the silicon semiconductor substrate is subjected to a heat treatment to selectively diffuse the aluminum into the silicon semiconductor substrate.The SiO.sub.2 mask which is formed before the heat treatment prevents impurity atoms from autodoping through the SiO.sub.2 mask. No cracking occurs in the SiO.sub.2 mask because the aluminum diffusion source is apart from the periphery of the SiO.sub.2 mask.

Abstract: In a semiconductor device, an active element is mounted on a supporter made of silicon carbide SiC. Since the thermal expansion coefficient of SiC is nearly equal to that of the semiconductor element, the integration of the element and the supporter will not give rise to thermal stresses in the element. Since silicon carbide has high degrees of thermal dissipation and conduction, the supporter of SiC can effectively dissipate heat generated in the semiconductor element. And since SiC has a high electrical conductivity and a high mechanical strength and is also light, it can be used as electrodes for the semiconductor element.

Abstract: A semiconductor pressure sensor having plural pressure sensitive diaphragms and capable of producing electric signals of at least two pressures.A semiconductor pressure sensor has a semiconductor single crystal chip (1) on which two diaphragms (12a, 12b) are shaped, pairs of strain gauges (13a and 14a, and 13b and 14b), each of which pairs are constructed on each pressure sensitive diaphragm, electrodes (15a and 16a, and 15b and 16b) which are provided for electrical connections of these strain gauges on the semiconductor single crystal, and an insulating substrate of borosilicate glass, the thermal expansion coefficient is substantially equal tol that of said semiconductor single-crystal chip, wherein the semiconductor single-crystal chip (1) and the glass substrate (2) are bonded to each other by an Anodic Bonding method, thereby being able to obtain a semiconductor pressure sensor which scarcely producing errors outputs.

Abstract: A semiconductor absolute pressure transducer assembly has a silicon diaphragm assembly and a covering member. The silicon diaphragm assembly has a circular pressure sensitive diaphragm, on the surface of which are diffused piezoresistors and conducting paths. The covering member composed of borosilicate glass has a circular well formed therein. On the surface of the silicon diaphragm assembly on which the piezoresistors and the conducting paths are diffused, a passivating layer of silicon dioxide is deposited. Further on the passivating layer, a conductive layer is formed by, for example, evaporating silicon. And the glass covering member is bonded on the silicon diaphragm assembly by anodic bonding. Namely, the silicon diaphragm assembly and the glass covering member are heated up to a certain high temperature and a relative high voltage applied across the conductive layer of the silicon diaphragm assembly and the glass covering members.

Abstract: A semiconductor device for use as a surge arrester of NPN (or PNP) construction, in which two NPN (or PNP) elements having different avalanche breakdown voltages are so formed that at least the intermediate layers among three layers constituting such sections are continuously connected within the same semiconductive substrate.Carriers generated in the NPN (or PNP) element, which triggers avalanche at a low voltage, cause the NPN (or PNP) element having a higher avalanche breakdown voltage to be switched to a highly conductive state.The semiconductor device of the invention provides great surge capacity, and can be used as a surge arrester of increased reliability.

Abstract: A method of fabricating a semiconductor device of the type wherein aluminium layers are selectively deposited on the major surface of a silicon semiconductor substrate and thereafter aluminium is selectively diffused into the silicon semiconductor substrate by means of heat treatment in an atmosphere including an oxygen gas. Recesses are selectively formed in at least one major surface of the silicon semiconductor substrate, aluminium is deposited onto the recesses, and the silicon semiconductor substrate is then subjected to a heat treatment to selectively diffuse the aluminium into the silicon semiconductor substrate. Layers of oxide of silicon-aluminium alloy formed on the major surface subjected to the aluminium diffusion will not cause any damage of a photo-mask and at the same time accuracy in positioning the photo-mask may be improved. A failure to mount a semiconductor element onto a heat sink may also be prevented.

Abstract: A method of fabricating a semiconductor device through selective diffusion of aluminum vapor into a silicon substrate by heating a sealed tube in which the silicon substrate and an aluminum source are disposed. The diffusion is effected with a low concentration of aluminum smaller than about 10.sup.17 atoms/cm.sup.3, thereby making it possible to use a silicon oxide film as a diffusion mask for the selective diffusion of aluminum at predetermined region of the silicon substrate.

Abstract: An aluminum diffusion source layer is formed by vacuum evaporation on a major surface of a silicon substrate. The silicon substrate is heated to form an aluminum-silicon alloy layer, an aluminum doped silicon recrystallization layer and an aluminum diffusion layer. Thereafter, the aluminum-silicon alloy layer is removed from the major surface of the silicon substrate. Drive-in diffusion is performed so as to diffuse, aluminum included in the silicon recrystallization layer and the aluminum diffusion layer, into the silicon substrate. As a result, the aluminum diffusion concentration of 10.sup.16 -10.sup.19 atoms/cm.sup.3 can be obtained.

Abstract: An image pickup tube target wherein a rectifying contact which is formed at a boundary of a first layer of a material selected from the group consisting of tin oxide, indium oxide, titanium oxide, cadmium sulfide, zinc sulfide, cadmium selenide, zinc selenide, n-type germanium, n-type silicon and mixture thereof, and a second layer of a material mainly consisting of selenium and including halogen, is reversely biased and operated at a region where signal current is saturated with respect to applied voltage. The second layer of the material includes 50 atomic percent or more of selenium and 0.1 - 1000 atomic ppm of halogen. More preferably, the second layer comprises 3-20 atomic % of arsenic, 0.1-20 atomic ppm of iodine and balance mainly consisting of selenium.