Abstract: The present invention provides, in an active matrix liquid crystal display device of the type including non-linear elements, for the application of an ON pulse-width modulation signal by the data line driving circuit at the rearward end of each selected period, during which the voltage corresponding to the duty-cycle of the selected signal is applied to the liquid crystal layer. The result is accurate reproduction of gray-scale images in the display under conditions of high duty-cycle driving. Further, cross-talk between columns caused by the data signal is controlled by supplying a signal voltage which eliminates the residual charges in the liquid crystal layer at the end of each selected period.

Abstract: After an external vertical sync signal is inputted, a divider circuit counts a predetermined number of clock pulses and delivers a vertical sync signal and a control signal allowing the external signal to pass through a gate circuit. The external vertical sync signal passing through the gate circuit resets the counter and a control signal from a detector circuit blocks the gate circuit until the counter delivers the next control signal. The divider circuit delivers a vertical sync pulse with proper timing and resets itself if the external signal is weak or absent.