Patents by Inventor Hiroaki ITSUJI

Hiroaki ITSUJI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230016735
    Abstract: Provided is a computer capable of reducing a diagnosis load. For each predetermined diagnosis target node among a plurality of nodes in a neural network, a determination processing unit calculates an expected output value expected as a calculation result of a node calculation process corresponding to the predetermined diagnosis target node, which is obtained when the node calculation process is executed using a predetermined input value. For each diagnosis target node, a generation processing unit generates as a diagnosis program a program for comparing the calculation result of the node calculation process corresponding to the diagnosis target node, which is obtained when the node calculation process is executed by an NN calculation processor using the input value, with the expected output value.
    Type: Application
    Filed: June 10, 2022
    Publication date: January 19, 2023
    Inventors: Hiroaki ITSUJI, Takumi UEZONO, Kenichi SHIMBO, Tadanobu TOBA
  • Publication number: 20220405581
    Abstract: A neural network that can detect abnormality of itself while suppressing redundancy of a scale is realized. A neural network optimization system includes a definition data analysis unit configured to analyze learned neural network definition data, an internode dependence degree analysis unit configured to generate dependence degree information indicating an internode dependence degree in a learned neural network defined by the learned neural network definition data, based on an analysis result of the learned neural network definition data, and a sensitive node extraction unit configured to extract a sensitive node in the learned neural network based on the dependence degree information.
    Type: Application
    Filed: December 7, 2020
    Publication date: December 22, 2022
    Inventors: Tadanobu TOBA, Takumi UEZONO, Kenichi SHIMBO, Hiroaki ITSUJI, Nozomi KASAHARA, Yutaka UEMATSU
  • Publication number: 20220261986
    Abstract: An increase in a diagnosis load can be reduced. A diagnosis pattern generating unit generates a diagnosis pattern including a plurality of data sets for diagnosing whether a processing result of calculation processing by a subset of a plurality of intermediate nodes included in a learned neural network is correct. An intermediate node calculation component identifying unit identifies a node-core relationship that is a correspondence relationship between the intermediate node and a calculation component that executes calculation processing by the intermediate node. A diagnosis pattern reducing unit reduces the number of the plurality of data sets based on the node-core relationship.
    Type: Application
    Filed: November 26, 2021
    Publication date: August 18, 2022
    Inventors: Takumi UEZONO, Tadanobu TOBA, Kenichi SHIMBO, Hiroaki ITSUJI
  • Patent number: 11367218
    Abstract: To detect a discrimination error in a type of an object. A calculation system includes a first device and a second device. The first device includes: a first object map generation unit configured to calculate, using first image information that is image information acquired by the first device, a first object map indicating a type of an object and a position of the object; and a first communication unit configured to transmit the first object map to the second device. The second device includes: a second object map generation unit configured to calculate, using second image information that is image information acquired by the second device, a second object map indicating a type of an object and a position of the object; and a comparison unit configured to compare the first object map and the second object map.
    Type: Grant
    Filed: November 24, 2020
    Date of Patent: June 21, 2022
    Assignee: HITACHI, LTD.
    Inventors: Hiroaki Itsuji, Takumi Uezono, Tadanobu Toba, Kenichi Shimbo, Yutaka Uematsu
  • Publication number: 20210357285
    Abstract: A program for causing a parallel arithmetic device including a plurality of arithmetic groups to execute parallel arithmetic is input. The program includes information defining each of the following: application arithmetic constituting predetermined processing; redundant arithmetic (which is redundant arithmetic of the application arithmetic and is arithmetic assigned to a surplus core(s) in a diagnosis target arithmetic group); and diagnostic arithmetic (arithmetic that is a comparison of results of the same redundant arithmetic by two or more diagnosis target arithmetic groups and is assigned to surplus cores in an arithmetic group for diagnosis). The surplus core(s) is a core(s) to which no application arithmetic is assigned.
    Type: Application
    Filed: May 3, 2021
    Publication date: November 18, 2021
    Inventors: Hiroaki ITSUJI, Takumi UEZONO, Kenichi SHIMBO, Tadanobu TOBA
  • Publication number: 20210166422
    Abstract: To detect a discrimination error in a type of an object. A calculation system includes a first device and a second device. The first device includes: a first object map generation unit configured to calculate, using first image information that is image information acquired by the first device, a first object map indicating a type of an object and a position of the object; and a first communication unit configured to transmit the first object map to the second device. The second device includes: a second object map generation unit configured to calculate, using second image information that is image information acquired by the second device, a second object map indicating a type of an object and a position of the object; and a comparison unit configured to compare the first object map and the second object map.
    Type: Application
    Filed: November 24, 2020
    Publication date: June 3, 2021
    Applicant: HITACHI, LTD.
    Inventors: Hiroaki ITSUJI, Takumi UEZONO, Tadanobu TOBA, Kenichi SHIMBO, Yutaka UEMATSU