Abstract: The purpose of this invention is to produce a stabilized terminal-blocked polycarbonate resin with a limited number of the terminal hydroxy groups having excellent thermal stability, color stability and hydrolysis resistance by an industrially advantageous method using a terminal blocking agent. In the production of a polycarbonate by the melt-polycondensation of an aromatic dihydroxy compound with an aromatic carbonic acid diester in the presence of a polycondensation catalyst, a terminal blocking agent expressed by the following formula (1) [in the formula, R1 is chlorine atom, methoxycarbonyl group or ethoxycarbonyl group; R2 is an alkyl group having a carbon number of 1 to 30, an alkoxy group having a carbon number of 1 to 30, an aryl group having a carbon number of 6 to 30 or an aryloxy group having a carbon number of 6-30] is added after the melt-polycondensation to the system in an amount of 0.

Abstract: An electrode material is disclosed which includes: a composite oxide of an A-site defect perovskite structure represented by the following general formula(A'.sub.1-x A".sub.x).sub.1-y (B'.sub.1-y B".sub.y)O.sub.3-.delta.wherein A' is at least one element selected from the group consisting of La, Nd and Y, and A" is at least one element selected from the group consisting of Ba, Sr and Ca, and B' is Co and B" is at least one element selected from the group consisting of Mn, Fe, Ni and Cu, and 0.1.ltoreq..alpha.<0.2, 0<.delta..ltoreq.1, 0<x<1 and 0<y<1; and 2-20 parts by weight of a fluorite oxide based on 100 parts by weight of the composite oxide.

Abstract: A novel composite oxide has an A-site defect type perovskite structure represented by a general formula:A.sub.1--.alpha. BO.sub.3--.delta.wherein A is at least one element selected from the group consisting of alkali metals, alkaline earth metals, rare earth elements, Y and Pb, and B is at least one element selected from the group consisting of Ti, Mn, Fe, Co, Ni, Cu and Al, and .alpha. is 0<.alpha.<0.2 and .delta. is 0.ltoreq..delta..ltoreq.1, provided that only a known perovskite type oxide (La.sub.1-x Sr.sub.x).sub.1-.alpha. MnO.sub.3-.delta. (when .alpha. is 0.06, x is 0.08.ltoreq.x.ltoreq.0.30, while when the value of x is 0.11, .alpha. is 0.06<.alpha.<0.11) is excluded.

Abstract: A process for the production of a terminal-blocked aromatic polycarbonate by melt-polycondensing an aromatic dihydroxy compound and diphenylcarbonate, the process comprising adding a specific carbonate or carboxylic ester after a polycarbonate formed has an intrinsic viscosity of at least 0.3 dl/g, to form a terminal-blocked polycarbonate having an intrinsic viscosity which is greater than, or smaller than, the intrinsic viscosity of the polycarbonate formed before the addition by 0.1 dl/g at the most; and a process for the production of a polycarbonate having an increased intrinsic viscosity by melt-polycondensing an aromatic dihydroxy compound and diphenylcarbonate, the process comprising adding a specific diaryl carbonate or dicarboxylic diaryl ester after a polycarbonate formed has an intrinsic viscosity of at least 0.3 dl/g, to form a polycarbonate having an intrinsic viscosity greater than the intrinsic viscosity of the polycarbonate formed before the addition by more than 0.1 dl/g.

Abstract: A bus cycle control unit of a microprocessor includes a sizing register for latching designation of a 16-bit data bus, and a bus cycle detector for detecting necessity of an additional bus cycle on the basis of the condition of the bus cycle. A command decoder, coupled to the sizing register and the bus cycle decoder, selectively drives bus enable terminals of the bus cycle control unit, and generates various control signals, so that data is transferred through either both the MSB (most significant bits) 16 bits and the (least significant bits) LSB 16 bits of a 32-bit data bus terminal, or only the LSB 16 bits of the 32-bit data bus terminal. Thus, the microprocessor can be freely coupled to a data bus of a fixed 32-bit width, a data bus of a fixed 16-bit width, or a data bus having its data width which can be switched between 32 bits and 16 bits.

Abstract: A process for the production of an aromatic polycarbonate, which comprises polycondensing an aromatic dihydroxy compound and a diaryl carbonate in the presence, as a polycondensation catalyst, of at least one alkali metal salt selected from the group consisting of alkali metal salts of ate-complexes of a metal element, which is silicon, germanium, stannum or plumbum, and alkali metal salts of oxoacids of said metal elements. The above aromatic polycarbonate is almost free from being colored, is also almost free from a decrease in polymerization degree when molded, and is further almost free from forming branches and insolubles.

Abstract: A microprocessor, which can be coupled externally with a coprocessor in order to extend an instruction set, includes a first set of terminals to be coupled to the coprocessor for data transfer between the microprocessor and the coprocessor, and a second set of terminals to be coupled to an external memory other than the coprocessor for data transfer between the microprocessor and the external memory. The microprocessor also includes a first bus control unit connected to the first set of terminals for controlling the first set of terminals, independently of the second set of terminals, thereby to control the data transfer between the microprocessor and the coprocessor, and a second bus control unit connected to the second set of terminals for controlling the second set of terminals, independently of the first set of terminals, thereby to control the data transfer between the microprocessor and the external memory.

Abstract: A microprocessor comprises a program counter for holding the address where the halt instruction is detected, a terminal for outputting a special status signal, a bus cycle control unit for generating the halt instruction indication bus cycle, and an execution unit for transferring the content of the program counter to the bus cycle control unit and requesting the start of the halt instruction indication bus cycle.Thus, the address where the processor halt instruction has been executed and other internal information are informed to an external, so that precise and certain debugging environment is obtained.

Abstract: An engine exhaust apparatus comprises a sound suppressing section for lowering the exhaust noise level as an exhaust gas discharged from the exhaust port passes through it. The exhaust apparatus is provided with an ejector section for introducing secondary air into the exhaust gas delivered from the sound suppressing section and mixing the gases, and a post-treatment section for purifying the gas mixture delivered from the ejector section. The exhaust gas discharged from an exhaust manifold gets into the ejector section through the sound suppressing section, and is then purified in the post-treatment section. Therefore, the ejector effect cannot be reduced by the sound suppressing section which is subject to high flow resistance. Thus, the exhaust noise level can be lowered with the ejector effect of the introduction of the secondary air improved considerably, and low cost and simple construction can be enjoyed.

Abstract: A microcomputer includes a maskable interrupt request terminal, a maskable interrupt request terminal, and a nonmaskable interrupt request terminal, and internally contains a status register having a group of flags indicating a maskable interrupt allowing level, a flag indicating that a nonmaskable interrupt processing is under execution, a flag indicating that an exception processing is under execution, and a flag indicating inhibition of the maskable interrupt. There are also internally provided first and second save registers for saving the content of the status register and the content of a program counter, respectively, when the maskable interrupt request is acknowledged, and third and fourth save registers for saving the content of the status register and the content of a program counter, respectively, when the nonmaskable interrupt request is acknowledged.

Abstract: In a synchronous TDM communications system wherein the data is transmitted after being subject to zero, negative or positive justification, a location of a time slot where data having a predetermined length begins, is specified by detecting a pointer. The pointer, which is included in a demultiplexed channel information, is extracted from the demultiplexed channel information. Further, a pointer value indicative of the predetermined length is detected. Still further, a justification status is also detected using the pointer extracted. On the other hand, a timing signal is received which corresponds to the zero justification. A pointer offset is produced using the timing signal, while another pointer offsets are generated by advancing and retarding the pointer offset by one time slot. Subsequently, one of the three offsets is selected depending on the justification status.

Abstract: In a digital communication system where a received stuff-synchronized TDM signal is demultiplexed into data signals each containing a sequence of frames. Each frame contains a pointer to indicate the start timing of the frame and specify positive, negative or zero destuffing. A pointer is detected from each data signal and compared with a previous pointer of the data signal stored in a memory. From this comparison the type of destuffing to be performed on a frame is determined, and in response to it, +1, -1 or 0 is added to the previous pointer to produce a current pointer, which is then used to rewrite the previous point. A binary block count value is generated by a single phase counter and compared with the current pointer to generate a start-of-frame signal if it equals the current value.

Abstract: A microprocessor includes a barrel shifter, a rewrite section, and a control section. The barrel shifter serves as a shift unit which is controlled by a microprogram and operated by microinstructions for performing extraction, insertion, and comparison of consecutive bit strings in word data. The rewrite section directly rewrites output data from the barrel shifter into its input. The control section controls the rewrite section by using the microprogram.

Abstract: A feedback type air-fuel ratio control system controls the air-fuel ratio of air-fuel mixture fed to an internal combustion engine in accordance with an information signal issued from a first oxygen sensor installed in an exhaust line of the engine. The exhaust line has a catalytic converter at a position downstream of the first oxygen sensor. There is further provided a system in the control system, which detects deterioration of the first oxygen sensor. The system comprises a computer and a second oxygen sensor of delayed response type installed in the exhaust line at a position upstream of the converter. The computer defines higher and lower slice levels with respect to the output of the second oxygen sensor and compares the output of the second oxygen sensor with the higher and lower slice levels.

Abstract: A microprogram control unit is provided for processing conditional branch micro-instructions stored in a micro-instruction memory to control the function of an information processing apparatus. The unit includes a microprogram counter coupled to the micro-instruction memory and contains an address for accessing the micro-instruction stored in the memory. A circuit is provided for registering the micro-instruction received from the micro-instruction memory and having an address field coupled to the microprogram counter and a condition field for designating a condition to be judged. A detecting circuit is coupled to the registering circuit to receive the micro-instruction therefrom and for detecting the conditional branch micro-instruction. Further, there is provided a circuit for generating status signals representing respectively a plurality of the status of the information processing apparatus and selectively outputting anyone of the status signals.

Abstract: An output circuit contains an output transistor connected between an output terminal and a reference voltage terminal, a precharge transistor connected between the output terminal and a power voltage terminal and a control circuit for controlling the precharge circuit. The control circuit renders the precharge transistor conductive temporarily when the output transistor is changed from the conductive state to the non-conductive state.

Abstract: There is disclosed an error detection circuit for a decoder which includes a plurality of circuit units connected in cascade, each of the circuit units having a first and a second input node, a selection input node connected to an associated one of output terminals of the decoder, and a first and a second output node, the first and second input nodes being connected respectively to the first and second output nodes, when the selection input node receives an active level, and the first output node being controlled to take a predetermined logic level and the second output node being controlled to take a logic level responsive to the logic level at the second input node when the selection input node receives an inactive level.

Abstract: A microprogram control unit is provided for processing conditional branch micro-instructions stored in a micro-instruction memory to control the function of an information processing apparatus. The unit includes a microprogram counter coupled to the micro-instruction memory and contains an address for accessing the micro-instruction stored in the memory. A circuit is provided for registering the micro-instruction received from the micro-instruction memory and having an address field coupled to the microprogram counter and a condition field for designating a condition to be judged. A detecting circuit is coupled to the registering circuits to receive the micro-instruction therefrom and for detecting the conditional branch micro-instruction. Further, there is provided a circuit for generating status signals representing respectively a plurality of the status of the information processing apparatus and selectively outputting anyone of the status signals.

Abstract: An internal combustion engine comprises a cylinder, a piston reciprocating in the cylinder, piston rings arranged on the periphery of the piston, and at least a pair of oil ports symmetrically provided in a wall member of the cylinder. The oil ports communicate with the space between the wall member and the piston and are positioned to open onto the portion below the lowermost piston ring during the reciprocation of the piston. A system supplies a portion of the lubricating oil for the internal combustion engine under pressure to this space through the oil ports, and conduits communicate the oil ports with the supply system.