Patents by Inventor Hiroaki Katou

Hiroaki Katou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210225837
    Abstract: A semiconductor device includes a semiconductor part; first and second electrodes respectively on back and front surfaces of the semiconductor part; a control electrode provided inside a trench of the semiconductor part; a third electrode provided inside the trench; a diode element provided at the front surface of the semiconductor part; a resistance element provided on the front surface of the semiconductor part via an insulating film, the diode element being electrically connected to the second electrode; a first interconnect electrically connecting the diode element and the resistance element, the first interconnect being electrically connected to the third electrode; and a second interconnect electrically connecting the resistance element and the semiconductor part. The resistance element is connected in series to the diode element. The diode element is provided to have a rectifying property reverse to a current direction flowing from the resistance element to the second electrode.
    Type: Application
    Filed: September 4, 2020
    Publication date: July 22, 2021
    Inventors: Hiroaki Katou, Tatsuya Nishiwaki, Kenya Kobayashi
  • Publication number: 20210202704
    Abstract: A semiconductor device includes a semiconductor part; first and second electrodes respectively on back and front surfaces of the semiconductor part; and a control electrode between the semiconductor part and the second electrode. The control electrode is provided inside a trench of the semiconductor part. The control electrode is electrically insulated from the semiconductor part by a first insulating film and electrically insulated from the second electrode by a second insulating film. The control electrode includes an insulator at a position apart from the first insulating film and the second insulating film. The semiconductor part includes a first layer of a first conductivity type provided between the first and second electrodes, the second layer of a second conductivity type provided between the first layer and the second electrode and the third layer of the first conductivity type selectively provided between the second layer and the second electrode.
    Type: Application
    Filed: September 8, 2020
    Publication date: July 1, 2021
    Inventors: Hiroyuki Kishimoto, Hiroaki Katou, Toshifumi Nishiguchi, Saya Shimomura, Kouta Tomita
  • Patent number: 10971621
    Abstract: A semiconductor device includes a semiconductor body, first and second electrodes, and first and second control electrodes. The first and second electrodes are provided on the semiconductor body. The first and second control electrodes each include a first portion positioned between the semiconductor body and the first electrode, a second portion positioned between the semiconductor body and the second electrode, and a third portion linked to the first and second portions. The semiconductor body includes first to fourth semiconductor layers. The second semiconductor layer is provided on the first semiconductor layer, and extends along the first to third portions. The fourth semiconductor layer is provided selectively on the second semiconductor layer, and extends along the second and third portions. The fourth semiconductor layer includes second conductivity-type impurities with a higher concentration than a concentration of second conductivity-type impurities in the second semiconductor layer.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: April 6, 2021
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Hiroaki Katou, Tatsuya Nishiwaki, Kohei Oasa, Toshifumi Nishiguchi
  • Publication number: 20210083103
    Abstract: A semiconductor device includes a semiconductor part, a first electrode, a plurality of control electrodes and a second electrode. The semiconductor part has a plurality of first trenches and a second trench. The plurality of first trenches are spaced from each other and arranged around the second trench. The first electrode is provided above the semiconductor part. The first electrode is provided over the plurality of first trenches and the second trench. The control electrodes are provided in the first trenches, respectively. The control electrodes each are electrically isolated from the semiconductor part by a first insulating film. The second electrode is provided in the second trench. The second electrode is electrically isolated from the semiconductor part by a second insulating film and electrically connected to the first electrode.
    Type: Application
    Filed: March 9, 2020
    Publication date: March 18, 2021
    Inventors: Hiroaki Katou, Kenya Kobayashi, Tatsuya Nishiwaki
  • Publication number: 20210074848
    Abstract: A semiconductor device includes a semiconductor part, an first electrode, a control electrode and second electrodes. The control electrode and the second electrodes are provided between the semiconductor part and the first electrode, and provided inside trenches, respectively. The second electrodes include first to third ones. The first and second ones of the second electrodes are adjacent to each other with a portion of the semiconductor part interposed. The second electrodes each are electrically isolated from the semiconductor part by a insulating film including first and second insulating portions adjacent to each other. The first insulating portion has a first thickness. The second insulating portion has a second thickness thinner than the first thickness. The first insulating portion is provided between the first and second ones of the second electrodes. The second insulating portion is provided between the first and third ones of the second electrodes.
    Type: Application
    Filed: March 5, 2020
    Publication date: March 11, 2021
    Inventors: Hiroaki Katou, Atsuro Inada, Tatsuya Shiraishi, Tatsuya Nishiwaki, Kenya Kobayashi
  • Publication number: 20210057574
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a first semiconductor region, a second semiconductor region, a third semiconductor region, a metal-including portion being conductive, an insulating portion, a gate electrode, a second electrode, a first interconnect layer, and a second interconnect layer. The first semiconductor region is provided on the first electrode. The second semiconductor region is provided on the first semiconductor region. The third semiconductor region and the metal-including portion are provided on portions of the second semiconductor region. The insulating portion is arranged in a second direction with the third semiconductor region, the second semiconductor region, and a portion of the first semiconductor region. The gate electrode and the second electrode are provided inside the insulating portion. The first interconnect layer is electrically connected to the gate electrode.
    Type: Application
    Filed: February 4, 2020
    Publication date: February 25, 2021
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tatsuya NISHIWAKI, Hiroaki KATOU, Kenya KOBAYASHI, Tsuyoshi KACHI
  • Patent number: 10903202
    Abstract: A semiconductor device includes a first semiconductor region of a first conductivity type, a plurality of second semiconductor regions of a second conductivity type, each comprising a first part, on the first semiconductor region, wherein the second semiconductor regions are spaced apart in a first direction, a third semiconductor region of the first conductivity type on each of the second semiconductor regions, an insulation portion between two of the second semiconductor regions, the insulation portion having one side in contact with one of the first parts and the other side in contact with one of the third semiconductor regions, a first electrode within the insulation portion, a gate electrode spaced apart from the first electrode and within the insulation portion, and a second electrode on the third semiconductor region and electrically connected to the first electrode and the third semiconductor region.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: January 26, 2021
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hiroaki Katou, Masatoshi Arai, Chikako Yoshioka
  • Patent number: 10872975
    Abstract: According to an embodiment, a semiconductor device includes a first electrode, a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of the first conductivity type, a gate electrode, and a second electrode. The gate electrode includes a first portion and a second portion. The first portion opposes the third semiconductor region, the second semiconductor region, and a portion of the first semiconductor region in a first direction perpendicular to a second direction from the first electrode toward the first semiconductor region. The second portion is arranged with the first portion in a third direction perpendicular to the first and first directions. The second portion opposes the second semiconductor region in the first direction. A lower end of the second portion is positioned higher than an interface between the first semiconductor region and the second semiconductor region.
    Type: Grant
    Filed: January 23, 2019
    Date of Patent: December 22, 2020
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventor: Hiroaki Katou
  • Patent number: 10840368
    Abstract: According to an embodiment, a semiconductor device includes a first electrode, a first semiconductor region, second semiconductor regions, third semiconductor regions, a first conductive portion, a gate electrode, and a second electrode. The gate electrode includes a first electrode portion and a second electrode portion. The first electrode portion opposes a portion of the first semiconductor region, one of the second semiconductor regions, and one of the third semiconductors in a first direction perpendicular to a second direction. The second electrode portion is located between the first electrode portion and another one of the third semiconductor regions in the first direction. The second electrode portion opposes another portion of the first semiconductor region, another one of the second semiconductor regions, and the other one of the third semiconductor regions. A second insulating portion including a void is provided between the first electrode portion and the second electrode portion.
    Type: Grant
    Filed: May 8, 2019
    Date of Patent: November 17, 2020
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tetsuya Ohno, Hiroaki Katou, Kenya Kobayashi, Toshifumi Nishiguchi, Saya Shimomura
  • Publication number: 20200295150
    Abstract: A semiconductor device of an embodiment includes: a first semiconductor layer having; a second semiconductor layer being provided on the first semiconductor layer; a third semiconductor layer being provided on the second semiconductor layer; a fourth semiconductor layer being provided on the third semiconductor layer; a field plate electrode provided in a trench via a first insulating film, the trench provided in the second semiconductor layer, the third semiconductor layer, and the fourth semiconductor layer; a first electrode provided in the trench to face the third semiconductor layer via a third insulating film; and a second insulating film provided in the trench to be interposed by the first electrodes and having a first portion, the first portion being interposed by lower ends of the first electrodes and having a width wider than a width of a second portion interposed by centers of the first electrodes.
    Type: Application
    Filed: August 1, 2019
    Publication date: September 17, 2020
    Applicants: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Tatsuya NISHIWAKI, Kentaro ICHINOSEKI, Hiroaki KATOU, Toshifumi NISHIGUCHI
  • Publication number: 20200295181
    Abstract: According to one embodiment, a semiconductor device includes first and second electrodes, first, second and third semiconductor regions, a first conductive portion, a gate electrode, and a second insulating portion. The first and second semiconductor regions are provided on the first semiconductor region. The third semiconductor regions are selectively provided respectively on the second semiconductor regions. The first conductive portion is provided inside the first semiconductor region with a first insulating portion interposed. The gate electrode is provided on the first conductive portion and the first insulating portion and separated from the first conductive portion. The gate electrode includes first and second electrode parts. The second insulating portion is provided between the first and second electrode parts. The second insulating portion includes first and second insulating parts. The second electrode is provided on the second and third semiconductor regions.
    Type: Application
    Filed: September 4, 2019
    Publication date: September 17, 2020
    Inventors: Saya Shimomura, Tetsuya Ohno, Hiroaki Katou
  • Publication number: 20200273978
    Abstract: According to an embodiment, a semiconductor device includes a first electrode, a first semiconductor region, second semiconductor regions, third semiconductor regions, a first conductive portion, a gate electrode, and a second electrode. The gate electrode includes a first electrode portion and a second electrode portion. The first electrode portion opposes a portion of the first semiconductor region, one of the second semiconductor regions, and one of the third semiconductors in a first direction perpendicular to a second direction. The second electrode portion is located between the first electrode portion and another one of the third semiconductor regions in the first direction. The second electrode portion opposes another portion of the first semiconductor region, another one of the second semiconductor regions, and the other one of the third semiconductor regions. A second insulating portion including a void is provided between the first electrode portion and the second electrode portion.
    Type: Application
    Filed: May 8, 2019
    Publication date: August 27, 2020
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tetsuya Ohno, Hiroaki Katou, Kenya Kobayashi, Toshifumi Nishiguchi, Saya Shimomura
  • Publication number: 20200266279
    Abstract: According to an embodiment, a semiconductor device includes a first electrode, a first semiconductor region, a second semiconductor region, a third semiconductor region, a gate electrode, a first conductive layer, and a second electrode. The gate electrode opposes, with a gate insulating portion interposed, a portion of the first semiconductor region, the second semiconductor region, and the third semiconductor region in a first direction. The first direction is perpendicular to a second direction. The second direction is from the first semiconductor region toward the second semiconductor region. The first conductive layer is provided inside the first semiconductor region with a first insulating layer interposed. Another portion of the first semiconductor region is provided between the first conductive layer and the second semiconductor region and between the first conductive layer and the gate electrode.
    Type: Application
    Filed: May 24, 2019
    Publication date: August 20, 2020
    Applicants: KABUSHIKI KAISHA TOSHIBA, Toshiba Electronic Devices & Storage Corporation
    Inventors: Masataka INO, Hiroaki KATOU
  • Publication number: 20200266293
    Abstract: A semiconductor device includes a semiconductor body, first and second electrodes, and first and second control electrodes. The first and second electrodes are provided on the semiconductor body. The first and second control electrodes each include a first portion positioned between the semiconductor body and the first electrode, a second portion positioned between the semiconductor body and the second electrode, and a third portion linked to the first and second portions. The semiconductor body includes first to fourth semiconductor layers. The second semiconductor layer is provided on the first semiconductor layer, and extends along the first to third portions. The fourth semiconductor layer is provided selectively on the second semiconductor layer, and extends along the second and third portions. The fourth semiconductor layer includes second conductivity-type impurities with a higher concentration than a concentration of second conductivity-type impurities in the second semiconductor layer.
    Type: Application
    Filed: August 16, 2019
    Publication date: August 20, 2020
    Inventors: Hiroaki Katou, Tatsuya Nishiwaki, Kohei Oasa, Toshifumi Nishiguchi
  • Publication number: 20200052111
    Abstract: According to an embodiment, a semiconductor device includes a first electrode, a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of the first conductivity type, a gate electrode, and a second electrode. The gate electrode includes a first portion and a second portion. The first portion opposes the third semiconductor region, the second semiconductor region, and a portion of the first semiconductor region in a first direction perpendicular to a second direction from the first electrode toward the first semiconductor region. The second portion is arranged with the first portion in a third direction perpendicular to the first and first directions. The second portion opposes the second semiconductor region in the first direction. A lower end of the second portion is positioned higher than an interface between the first semiconductor region and the second semiconductor region.
    Type: Application
    Filed: January 23, 2019
    Publication date: February 13, 2020
    Inventor: Hiroaki Katou
  • Patent number: 10529805
    Abstract: A semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of the first conductivity type, first and second electrodes, second and third insulating units, and gate electrodes provided in the first semiconductor region and the second semiconductor region via a first insulating unit and extending in a first direction. The first electrode is provided on and electrically connected to the third semiconductor region. The second insulating unit is spaced apart from the gate electrodes in the first semiconductor region and extends in a second direction. The third insulating unit includes an insulating portion extending in the first direction and positioned between the gate electrodes and the second insulating unit in the second direction. The second electrode is electrically connected to the gate electrodes and provided on the second and third insulating units.
    Type: Grant
    Filed: March 1, 2017
    Date of Patent: January 7, 2020
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Saya Shimomura, Hiroaki Katou, Kenya Kobayashi
  • Patent number: 10340346
    Abstract: A semiconductor device includes a drain layer, a drift layer, a base region, a source region, trenches, base contact region, gate regions, and field plate electrodes. The drain layer extends in a first and a second direction. The drift layer is on the drain layer. The base region is on the drift layer. The source region is on the base region. The trenches are in an array and each trench reaches the drift layer from the source region. The base contact region is along the second direction in a region in which the trenches do not contiguously exist along the second direction and electrically connects the source region to the base region. Each gate regions is along an inner wall of the trenches. Each field plate electrodes is in an inside of the gate regions and is longer than the gate regions in the third direction.
    Type: Grant
    Filed: March 12, 2018
    Date of Patent: July 2, 2019
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Hiroaki Katou, Kenya Kobayashi
  • Patent number: 10319850
    Abstract: According to one embodiment, a semiconductor device comprising a drain layer, a base region, a source region, a field plate electrode, and a gate region. The drift layer is formed on the drain layer. The base region is formed on the drift layer. The source region is formed on the base region. The field plate electrode is formed inside a trench reaching the drift layer through the base region from the source region. The gate region is formed inside the trench, wherein the gate region has a U-shape including a recess on the gate region in a direction along the trench and is formed such that, on upper surfaces of respective both ends of the U-shape, a position of an inner end on a side of the recess is higher than a position of an outer end on a side of the second insulating film.
    Type: Grant
    Filed: March 9, 2018
    Date of Patent: June 11, 2019
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Saya Shimomura, Toshifumi Nishiguchi, Hiroaki Katou, Kenya Kobayashi, Takahiro Kawano, Tetsuya Ohno
  • Publication number: 20190088776
    Abstract: According to one embodiment, a semiconductor device comprising a drain layer, a base region, a source region, a field plate electrode, and a gate region. The drift layer is formed on the drain layer. The base region is formed on the drift layer. The source region is formed on the base region. The field plate electrode is formed inside a trench reaching the drift layer through the base region from the source region. The gate region is formed inside the trench, wherein the gate region has a U-shape including a recess on the gate region in a direction along the trench and is formed such that, on upper surfaces of respective both ends of the U-shape, a position of an inner end on a side of the recess is higher than a position of an outer end on a side of the second insulating film.
    Type: Application
    Filed: March 9, 2018
    Publication date: March 21, 2019
    Inventors: Saya Shimomura, Toshifumi Nishiguchi, Hiroaki Katou, Kenya Kobayashi, Takahiro Kawano, Tetsuya Ohno
  • Publication number: 20190088750
    Abstract: A semiconductor device includes a drain layer, a drift layer, a base region, a source region, trenches, base contact region, gate regions, and field plate electrodes. The drain layer extends in a first and a second direction. The drift layer is on the drain layer. The base region is on the drift layer. The source region is on the base region. The trenches are in an array and each trench reaches the drift layer from the source region. The base contact region is along the second direction in a region in which the trenches do not contiguously exist along the second direction and electrically connects the source region to the base region. Each gate regions is along an inner wall of the trenches. Each field plate electrodes is in an inside of the gate regions and is longer than the gate regions in the third direction.
    Type: Application
    Filed: March 12, 2018
    Publication date: March 21, 2019
    Inventors: Hiroaki Katou, Kenya Kobayashi