Abstract: An optical power supply system comprising: a power supply optical communication device that supplies power using an optical signal for power supply; and a power reception optical communication device that is driven by power obtained from the optical signal for power supply transmitted from the power supply optical communication device, wherein the power supply optical communication device includes an optical power supply unit that transmits the optical signal for power supply to the power reception optical communication device, and an optical signal generation unit that converts a continuous wave used for frequency conversion of a radio signal received by the power reception optical communication device into an optical signal and transmits the optical signal to the power reception optical communication device, the power reception optical communication device includes a photoelectric conversion unit that converts the optical signal transmitted from the power supply optical communication device into an electric

Abstract: An optical power supply system includes a power supply optical communication device that supplies power using an optical signal for power supply and a power reception optical communication device that is driven by power obtained from the optical signal for power supply transmitted from the power supply optical communication device, wherein the power supply optical communication device includes an optical power supply unit that transmits the optical signal for power supply to the power reception optical communication device and a data transmission/reception unit that transmits the optical signal for power supply to the power reception optical communication device when there is no data to be transmitted to the power reception optical communication device, and the power reception optical communication device includes a power storage unit that stores power obtained based on the optical signal for power supply transmitted from the optical power supply unit and the optical signal for power supply transmitted from t

Abstract: An optical power supply system, comprising: a power supply optical communication device that supplies power using an optical signal for power supply; and a power receiving optical communication device that is driven by power obtained from the optical signal for power supply transmitted from the power supply optical communication device, wherein the power supply optical communication device includes an optical power supply unit that transmits the optical signal for power supply to the power receiving optical communication device, when there is data to be transmitted to the power receiving optical communication device, transmit a sleep control signal having a shape corresponding to the time length of the data or having a shape with high noise resistance, to cancel a sleep state of a part of function units of the power receiving optical communication device, to the power receiving optical communication device, and the power receiving optical communication device includes a signal detection unit that detects the

Abstract: A power supply side optical communication apparatus supplies power to a power receiving side optical communication apparatus using an optical signal for power supply, a power storage unit stores the supplied power, a data control unit of the power supply side optical communication apparatus superimposes data transmission/reception control information related to transmission/reception of data transmitted/received by a data transmission/reception unit on the optical signal for power supply, a control information detection unit detects the data transmission/reception control information superimposed on the optical signal for power supply, and a power supply control unit detects presence or absence of transmission and reception of the data in an optical transmission/reception unit and an external transmission/reception unit on the basis of the data transmission/reception control information detected by the control information detection unit and data stored in a data storage unit, and supplies the power stored in

Abstract: An aspect of the present invention is an optical communication system in which an optical line terminal and an optical network unit are connected by an optical communication line, in which when receiving a first activation signal from the optical line terminal in a sleep state, the optical network unit executes activation processing for transition from the sleep state to an activation state and notifies the optical line terminal of an activation time that is a time required for executing the activation processing, and the optical line terminal transmits the activation signal at a time of transmission of second and subsequent activation signals, and then the optical line terminal starts data transmission to the optical line terminal after elapse of the activation time a notification of which has been given from the optical network unit.

Abstract: A power supply side optical communication apparatus supplies power to a power receiving side optical communication apparatus using an optical signal for power supply, a power storage unit stores the supplied power, a data control unit of the power supply side optical communication apparatus superimposes data transmission/reception control information related to transmission/reception of data transmitted/received by a data transmission/reception unit on the optical signal for power supply, a control information detection unit detects the data transmission/reception control information superimposed on the optical signal for power supply, a data transfer control unit calculates a data amount of data to be output to each of an optical transmission/reception unit and an external transmission/reception unit on the basis of the data transmission/reception control information and a data amount of data stored in a data storage unit, outputs data equal to or less than a transferable data amount calculated on the basis

Abstract: An optical power supply system including a power supply side optical communication device that supplies power using an optical signal for power supply, and a power receiving side optical communication device that is driven by power obtained from the optical signal for power supply transmitted from the power supply side optical communication device, in which: the power supply side optical communication device includes a sleep control unit that generates a sleep cancellation signal for canceling sleep states of some functional units included in the power receiving side optical communication device, and a power supply control unit that superimposes the sleep cancellation signal on the optical signal for power supply and transmits the superimposed signal to the power receiving side optical communication device; and the power receiving side optical communication device includes a detection unit that detects the sleep cancellation signal superimposed on the optical signal for power supply, and a control unit that p

Abstract: A light receiving portion of a photodiode is connected to an external light source via an optical transmission line. A power storage unit stores electrical energy generated by the photodiode. A bias circuit takes out electrical energy corresponding to the amount of stored power from the power storage unit, and applies a voltage to the cathode of the photodiode.

Abstract: A reset signal is generated by a TIA circuit alone. In an embodiment, a transimpedance amplifier configured to convert a current signal into a voltage signal includes a transimpedance stage including an amplification stage constituted of a transistor with a grounded emitter, and a comparator configured to compare a collector voltage of the transistor with a reference voltage and output a reset signal.

Abstract: A reset signal is generated by a TIA circuit alone. In an embodiment, a transimpedance amplifier configured to convert a current signal into a voltage signal includes a transimpedance stage, a gain control circuit configured to compare an output of the transimpedance stage with a reference voltage and output a gain control voltage, and a reset signal output circuit configured to output a reset signal having a predetermined pulse width at a timing of at least one of a rise or a fall of the gain control voltage.

Abstract: A track-and-hold circuit with a high sampling rate and reduced power consumption is provided. A track-and-hold circuit performing switching between a track mode in which a data signal that is equivalent to an input data signal is output and a hold mode in which a data signal which is input at a time of switching from the track mode to the hold mode is held and output, by using a clock signal, such that only the data signal in the hold mode is output, the track-and-hold circuit including: two sampling circuits configured to be connected in parallel to an input of the data signal and receive an in-phase data signal; a clock circuit configured to input a clock signal, which has a phase opposite to a phase of a clock signal input to one of the two sampling circuits, to the other of the two sampling circuits; and a multiplexer circuit configured to select and output a data output of either one of the two sampling circuits that is in the hold mode, by using the clock signal.

Abstract: A track-and-hold circuit with a high sampling rate and reduced power consumption is provided. A track-and-hold circuit performing switching between a track mode in which a data signal that is equivalent to an input data signal is output and a hold mode in which a data signal which is input at a time of switching from the track mode to the hold mode is held and output, by using a clock signal, such that only the data signal in the hold mode is output, the track-and-hold circuit including: two sampling circuits configured to be connected in parallel to an input of the data signal and receive an in-phase data signal; a clock circuit configured to input a clock signal, which has a phase opposite to a phase of a clock signal input to one of the two sampling circuits, to the other of the two sampling circuits; and a multiplexer circuit configured to select and output a data output of either one of the two sampling circuits that is in the hold mode, by using the clock signal.

Abstract: An amplifier applied to TIA is provided to suppress the noise caused by a current source. An amplifier constituting a transimpedance amplifier includes an inductor element inserted between a current source connected to an input terminal of an amplification stage and a power source voltage line. The current source includes a first transistor in which a base terminal is connected to a current control bias and a collector terminal is connected to the input terminal. The inductor element is inserted between the emitter terminal of the first transistor and the power source voltage line.

Abstract: A driver circuit 11 includes a plurality of cascode-connected NMOS transistors, a modulating signal VGN1 is applied to a gate terminal of a lowermost stage transistor TN1 located at a lowermost stage out of the NMOS transistors, and an upper stage bias potential VGN2 that is a sum of a minimum gate-source voltage VGN1min and a maximum drain-source voltage VDS1max of a transistor (TN1) located immediately below an upper stage transistor located at an upper stage above the lowermost stage transistor of the NMOS transistors is applied to the upper stage transistor TN2.

Abstract: An amplifier applied to TIA is provided to suppress the noise caused by a current source. An amplifier constituting a transimpedance amplifier includes an inductor element inserted between a current source connected to an input terminal of an amplification stage and a power source voltage line. The current source includes a first transistor in which a base terminal is connected to a current control bias and a collector terminal is connected to the input terminal. The inductor element is inserted between the emitter terminal of the first transistor and the power source voltage line.

Abstract: A driver circuit 11 includes a plurality of cascode-connected NMOS transistors, a modulating signal VGN1 is applied to a gate terminal of a lowermost stage transistor TN1 located at a lowermost stage out of the NMOS transistors, and an upper stage bias potential VGN2 that is a sum of a minimum gate-source voltage VGN1min and a maximum drain-source voltage VDS1max of a transistor (TN1) located immediately below an upper stage transistor located at an upper stage above the lowermost stage transistor of the NMOS transistors is applied to the upper stage transistor TN2.

Abstract: An optical modulator driver circuit (1) includes an amplifier (50, Q10, Q11, R10-R13), and a current amount adjustment circuit (51) capable of adjusting a current amount of the amplifier (50) in accordance with a desired operation mode. The current amount adjustment circuit (51) includes at least two current sources (IS10) that are individually ON/OFF-controllable in accordance with a binary control signal representing the desired operation mode.

Abstract: An optical modulator driver circuit (1) includes an amplifier (50, Q10, Q11, R10-R13), and a current amount adjustment circuit (51) capable of adjusting a current amount of the amplifier (50) in accordance with a desired operation mode. The current amount adjustment circuit (51) includes at least two current sources (IS10) that are individually ON/OFF-controllable in accordance with a binary control signal representing the desired operation mode.

Abstract: A signal multiplexing device includes a selector (1) that selects one of input data (4) and a complementary signal (16), a clock recovery circuit (30a) that adjusts the phase of a recovered clock (7) to the timing of the output signal of the selector (1), and a flip-flop circuit (3) that performs identification/recovery of the output signal of the selector (1) based on the recovered clock (7). The frequency of the complementary signal (16) is an integral submultiple of the frequency of the recovered clock (7). The selector (1) selects the complementary signal (16) during part of the no-signal period of the input data (4).

Abstract: An inductor (1) includes an inductor (L11P) formed into the shape of a spiral on the outer circumference of an inductor region and having a start point connected to a terminal (N11P), an inductor (L12P) formed into the shape of a spiral on the inner circumference of the inductor region and having a start point at the end point of the inductor (L11P) and an end point connected to a terminal (N12P), and an inductor (L13P) formed into the shape of a spiral in a region sandwiched between the inductor (L11P) and the inductor (L12P) and having a start point at a node between the inductor (L11P) and the inductor (L12P) and an end point connected to a terminal (N13P).