Patents by Inventor Hiroaki Kotani
Hiroaki Kotani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150155049Abstract: A nonvolatile memory apparatus including a control circuit, plural terminals having clock, command and other terminals, data and command registers, and plural nonvolatile memory cells. The clock terminal receives a clock signal and the command terminal receives commands including read and program commands. The data register receives from and outputs data to outside. The control circuit reads operation steps from memory used to control the apparatus. The control circuit, responsive to the read command, controls reading data from the memory cells, storing read data to the data register, and outputting read data via the other terminal, not the command terminal, based on the clock signal. The control circuit, responsive to the program command, controls receiving data via the other terminal, not the command terminal, based on the clock signal, storing received data to the data register and writing received data to the memory cells.Type: ApplicationFiled: June 16, 2014Publication date: June 4, 2015Inventors: Hitoshi MIWA, Hiroaki KOTANI
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Patent number: 8804431Abstract: A nonvolatile memory apparatus including a control circuit, plural terminals having clock, command and other terminals, data and command registers, and plural nonvolatile memory cells. The clock terminal receives a clock signal and the command terminal receives commands including read and program commands. The data register receives from and outputs data to outside. The control circuit reads operation steps from memory used to control the apparatus. The control circuit, responsive to the read command, controls reading data from the memory cells, storing read data to the data register, and outputting read data via the other terminal, not the command terminal, based on the clock signal. The control circuit, responsive to the program command, controls receiving data via the other terminal, not the command terminal, based on the clock signal, storing received data to the data register and writing received data to the memory cells.Type: GrantFiled: April 23, 2012Date of Patent: August 12, 2014Assignee: S4, Inc.Inventors: Hitoshi Miwa, Hiroaki Kotani
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Patent number: 7977486Abstract: An electron donor-acceptor dyad is provided that can provide a charge-separated state with longevity and not only high oxidizing power but also high reducing power. A compound of the present invention is a quinolinium ion derivative represented by the following formula (I), a stereoisomer or tautomer thereof, or a salt thereof: where R1 is a hydrogen atom or an alkyl group, and Ar1 to Ar3 each are a hydrogen atom or an electron-donating group. The compound of the present invention has the above-mentioned structure and therefore can provide a charge-separated state with longevity and not only high oxidizing power but also high reducing power and can be used for various products such as photocatalysts, photosensitizers, dyes, oxidants, reductants, dye-sensitized solar cells, and organic EL devices.Type: GrantFiled: March 5, 2007Date of Patent: July 12, 2011Assignee: Osaka UniversityInventors: Shunichi Fukuzumi, Hiroaki Kotani, Kei Ohkubo
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Patent number: 7942665Abstract: An igniter can include a safety mechanism which is easily operated by an adult but is difficult for a child to release. In particular, an igniter can include: a nozzle section which emits a flame; a fuel introduction section; an ignition section which ignites the introduced fuel, wherein the ignition section is configured in such a manner that the fuel is ignited by movement of an ignition operating section to an ignition position; a movement restricting section having restricting sections which restrict the movement of the ignition operating section; and a permitting section which permits movement. When moving the movement restricting section, either the restricting sections or the permitting section can be disposed so as to correspond to the direction of movement of the ignition operating section.Type: GrantFiled: September 17, 2008Date of Patent: May 17, 2011Assignee: Iwatani CorporationInventor: Hiroaki Kotani
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Publication number: 20100020615Abstract: A nonvolatile memory apparatus including a control circuit, plural terminals having clock, command and other terminals, data and command registers, and plural nonvolatile memory cells. The clock terminal receives a clock signal and the command terminal receives commands including read and program commands. The data register receives from and outputs data to outside. The control circuit reads operation steps from memory used to control the apparatus. The control circuit, responsive to the read command, controls reading data from the memory cells, storing read data to the data register, and outputting read data via the other terminal, not the command terminal, based on the clock signal. The control circuit, responsive to the program command, controls receiving data via the other terminal, not the command terminal, based on the clock signal, storing received data to the data register and writing received data to the memory cells.Type: ApplicationFiled: May 4, 2009Publication date: January 28, 2010Inventors: Hitoshi MIWA, Hiroaki Kotani
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Publication number: 20100021854Abstract: An igniter can include a safety mechanism which is easily operated by an adult but is difficult for a child to release. In particular, an igniter can include: a nozzle section which emits a flame; a fuel introduction section; an ignition section which ignites the introduced fuel, wherein the ignition section is configured in such a manner that the fuel is ignited by movement of an ignition operating section to an ignition position; a movement restricting section having restricting sections which restrict the movement of the ignition operating section; and a permitting section which permits movement. When moving the movement restricting section, either the restricting sections or the permitting section can be disposed so as to correspond to the direction of movement of the ignition operating section.Type: ApplicationFiled: September 17, 2008Publication date: January 28, 2010Inventor: Hiroaki Kotani
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Publication number: 20100004454Abstract: An electron donor-acceptor dyad is provided that can provide a charge-separated state with longevity and not only high oxidizing power but also high reducing power. A compound of the present invention is a quinolinium ion derivative represented by the following formula (I), a stereoisomer or tautomer thereof, or a salt thereof: where R1 is a hydrogen atom or an alkyl group, and Ar1 to Ar3 each are a hydrogen atom or an electron-donating group. The compound of the present invention has the above-mentioned structure and therefore can provide a charge-separated state with longevity and not only high oxidizing power but also high reducing power and can be used for various products such as photocatalysts, photosensitizers, dyes, oxidants, reductants, dye-sensitized solar cells, and organic EL devices.Type: ApplicationFiled: March 5, 2007Publication date: January 7, 2010Applicant: OSAKA UNIVERSITYInventors: Shunichi Fukuzumi, Hiroaki Kotani, Kei Ohkubo
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Patent number: 7542339Abstract: A nonvolatile memory apparatus including a control circuit, plural terminals having clock, command and other terminals, data and command registers, and plural nonvolatile memory cells. The clock terminal receives a clock signal and the command terminal receives commands including read and program commands. The data register receives from and outputs data to outside. The control circuit reads operation steps from memory used to control the apparatus. The control circuit, responsive to the read command, controls reading data from the memory cells, storing read data to the data register, and outputting read data via the other terminal, not the command terminal, based on the clock signal. The control circuit, responsive to the program command, controls receiving data via the other terminal, not the command terminal, based on the clock signal, storing received data to the data register and writing received data to the memory cells.Type: GrantFiled: August 20, 2007Date of Patent: June 2, 2009Assignee: Solid State Storage Solutions, LLCInventors: Hitoshi Miwa, Hiroaki Kotani
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Patent number: 7327604Abstract: A nonvolatile memory apparatus including a control circuit, plural terminals having clock, command and other terminals, data and command registers, and plural nonvolatile memory cells. The clock terminal receives a clock signal and the command terminal receives commands including read and program commands. The data register receives from and outputs data to outside. The control circuit reads operation steps from memory used to control the apparatus. The control circuit, responsive to the read command, controls reading data from the memory cells, storing read data to the data register, and outputting read data via the other terminal, not the command terminal, based on the clock signal. The control circuit, responsive to the program command, controls receiving data via the other terminal, not the command terminal, based on the clock signal, storing received data to the data register and writing received data to the memory cells.Type: GrantFiled: November 17, 2006Date of Patent: February 5, 2008Assignee: Renesas Technology CorporationInventors: Hitoshi Miwa, Hiroaki Kotani
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Patent number: 7324375Abstract: A nonvolatile memory apparatus including a control circuit, plural terminals having clock, command and other terminals, data and command registers, and plural nonvolatile memory cells. The clock terminal receives a clock signal and the command terminal receives commands including read and program commands. The data register receives from and outputs data to outside. The control circuit reads operation steps from memory used to control the apparatus. The control circuit, responsive to the read command, controls reading data from the memory cells, storing read data to the data register, and outputting read data via the other terminal, not the command terminal, based on the clock signal. The control circuit, responsive to the program command, controls receiving data via the other terminal, not the command terminal, based on the clock signal, storing received data to the data register and writing received data to the memory cells.Type: GrantFiled: May 8, 2006Date of Patent: January 29, 2008Assignee: Solid State Storage Solutions, LLCInventors: Hitoshi Miwa, Hiroaki Kotani
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Publication number: 20070291538Abstract: A nonvolatile memory apparatus including a control circuit, plural terminals having clock, command and other terminals, data and command registers, and plural nonvolatile memory cells. The clock terminal receives a clock signal and the command terminal receives commands including read and program commands. The data register receives from and outputs data to outside. The control circuit reads operation steps from memory used to control the apparatus. The control circuit, responsive to the read command, controls reading data from the memory cells, storing read data to the data register, and outputting read data via the other terminal, not the command terminal, based on the clock signal. The control circuit, responsive to the program command, controls receiving data via the other terminal, not the command terminal, based on the clock signal, storing received data to the data register and writing received data to the memory cells.Type: ApplicationFiled: August 20, 2007Publication date: December 20, 2007Inventors: Hitoshi Miwa, Hiroaki Kotani
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Patent number: 7286397Abstract: A nonvolatile memory apparatus including a control circuit, plural terminals having clock, command and other terminals, data and command registers, and plural nonvolatile memory cells. The clock terminal receives a clock signal and the command terminal receives commands including read and program commands. The data register receives from and outputs data to outside. The control circuit reads operation steps from memory used to control the apparatus. The control circuit, responsive to the read command, controls reading data from the memory cells, storing read data to the data register, and outputting read data via the other terminal, not the command terminal, based on the clock signal. The control circuit, responsive to the program command, controls receiving data via the other terminal, not the command terminal, based on the clock signal, storing received data to the data register and writing received data to the memory cells.Type: GrantFiled: March 25, 2005Date of Patent: October 23, 2007Assignee: Renesas Technology CorporationInventors: Hitoshi Miwa, Hiroaki Kotani
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Publication number: 20070064483Abstract: A nonvolatile memory apparatus including a control circuit, plural terminals having clock, command and other terminals, data and command registers, and plural nonvolatile memory cells. The clock terminal receives a clock signal and the command terminal receives commands including read and program commands. The data register receives from and outputs data to outside. The control circuit reads operation steps from memory used to control the apparatus. The control circuit, responsive to the read command, controls reading data from the memory cells, storing read data to the data register, and outputting read data via the other terminal, not the command terminal, based on the clock signal. The control circuit, responsive to the program command, controls receiving data via the other terminal, not the command terminal, based on the clock signal, storing received data to the data register and writing received data to the memory cells.Type: ApplicationFiled: November 17, 2006Publication date: March 22, 2007Inventors: Hitoshi Miwa, Hiroaki Kotani
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Patent number: 7193894Abstract: A nonvolatile memory apparatus including a control circuit, plural terminals having clock, command and other terminals, data and command registers, and plural nonvolatile memory cells. The clock terminal receives a clock signal and the command terminal receives commands including read and program commands. The data register receives from and outputs data to outside. The control circuit reads operation steps from memory used to control the apparatus. The control circuit, responsive to the read command, controls reading data from the memory cells, storing read data to the data register, and outputting read data via the other terminal, not the command terminal, based on the clock signal. The control circuit, responsive to the program command, controls receiving data via the other terminal, not the command terminal, based on the clock signal, storing received data to the data register and writing received data to the memory cells.Type: GrantFiled: March 29, 2004Date of Patent: March 20, 2007Assignee: Renesas Technology Corp.Inventors: Hitoshi Miwa, Hiroaki Kotani
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Patent number: 7161830Abstract: A nonvolatile memory apparatus including a control circuit, plural terminals having clock, command and other terminals, data and command registers, and plural nonvolatile memory cells. The clock terminal receives a clock signal and the command terminal receives commands including read and program commands. The data register receives from and outputs data to outside. The control circuit reads operation steps from memory used to control the apparatus. The control circuit, responsive to the read command, controls reading data from the memory cells, storing read data to the data register, and outputting read data via the other terminal, not the command terminal, based on the clock signal. The control circuit, responsive to the program command, controls receiving data via the other terminal, not the command terminal, based on the clock signal, storing received data to the data register and writing received data to the memory cells.Type: GrantFiled: December 30, 2004Date of Patent: January 9, 2007Assignee: Renesas Technology Corp.Inventors: Hitoshi Miwa, Hiroaki Kotani
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Publication number: 20060198201Abstract: A nonvolatile memory apparatus including a control circuit, plural terminals having clock, command and other terminals, data and command registers, and plural nonvolatile memory cells. The clock terminal receives a clock signal and the command terminal receives commands including read and program commands. The data register receives from and outputs data to outside. The control circuit reads operation steps from memory used to control the apparatus. The control circuit, responsive to the read command, controls reading data from the memory cells, storing read data to the data register, and outputting read data via the other terminal, not the command terminal, based on the clock signal. The control circuit, responsive to the program command, controls receiving data via the other terminal, not the command terminal, based on the clock signal, storing received data to the data register and writing received data to the memory cells.Type: ApplicationFiled: May 8, 2006Publication date: September 7, 2006Inventors: Hitoshi Miwa, Hiroaki Kotani
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Patent number: 6965525Abstract: A nonvolatile memory apparatus including a control circuit, plural terminals including clock, command and other terminals, a clock generator, and plural nonvolatile memory cells. The clock and command terminals respectively receive a first clock signal and commands including read and program commands. The clock generator generates a second clock signal. In response to the read command, the control circuit controls reading data from the memory cells, and outputting data via the other terminal not the command terminal in response to the first clock signal. In response to the program command, the control circuit controls receiving data via the other terminal not the command terminal in response to the first clock signal, and writing data to the memory cells. The data writing to ones of said nonvolatile memory cells is performed using the second clock signal.Type: GrantFiled: March 29, 2004Date of Patent: November 15, 2005Assignee: Renesas Technology Corp.Inventors: Hitoshi Miwa, Hiroaki Kotani
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Publication number: 20050162940Abstract: A nonvolatile memory apparatus including a control circuit, plural terminals having clock, command and other terminals, data and command registers, and plural nonvolatile memory cells. The clock terminal receives a clock signal and the command terminal receives commands including read and program commands. The data register receives from and outputs data to outside. The control circuit reads operation steps from memory used to control the apparatus. The control circuit, responsive to the read command, controls reading data from the memory cells, storing read data to the data register, and outputting read data via the other terminal, not the command terminal, based on the clock signal. The control circuit, responsive to the program command, controls receiving data via the other terminal, not the command terminal, based on the clock signal, storing received data to the data register and writing received data to the memory cells.Type: ApplicationFiled: March 25, 2005Publication date: July 28, 2005Inventors: Hitoshi Miwa, Hiroaki Kotani
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Publication number: 20050146941Abstract: A nonvolatile memory apparatus including a control circuit, plural terminals having clock, command and other terminals, data and command registers, and plural nonvolatile memory cells. The clock terminal receives a clock signal and the command terminal receives commands including read and program commands. The data register receives from and outputs data to outside. The control circuit reads operation steps from memory used to control the apparatus. The control circuit, responsive to the read command, controls reading data from the memory cells, storing read data to the data register, and outputting read data via the other terminal, not the command terminal, based on the clock signal. The control circuit, responsive to the program command, controls receiving data via the other terminal, not the command terminal, based on the clock signal, storing received data to the data register and writing received data to the memory cells.Type: ApplicationFiled: December 30, 2004Publication date: July 7, 2005Inventors: Hitoshi Miwa, Hiroaki Kotani
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Patent number: D809343Type: GrantFiled: May 25, 2016Date of Patent: February 6, 2018Inventor: Hiroaki Kotani