Patents by Inventor Hiroaki Kudo
Hiroaki Kudo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230193171Abstract: A beer beverage comprising 4-vinyl phenol (4VP) and 4-vinyl guaiacol (4VG) in the 4VG:4VP weight ratio of from 2.5-10, the overall weight proportion of 4VG and 4VP in the beverage being from 0.1 ppm to 0.6 ppm. The compounds provide desirable beer flavor characteristics to both beers and non-alcoholic beer beverages deficient in these characteristics.Type: ApplicationFiled: May 11, 2021Publication date: June 22, 2023Inventors: Chisato MAYAMA, Hiroaki KUDO, Yohei MIYAMOTO
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Patent number: 6784931Abstract: An amplification type solid state imaging device of the present invention includes a plurality of pixels arranged in a matrix each of which includes: a photodiode for photoelectric conversion; a signal amplification MOS transistor which functions as an amplifier for amplifying a change in the potential of the photodiode; a pixel selection MOS transistor; and a reset MOS transistor for resetting the potential of the photodiode to a predetermined initial potential, gate terminals of the selection MOS transistors of the pixels along each row being commonly connected together with a predetermined signal read pulse being applied to the gate terminals, gate terminals of the reset MOS transistors of the pixels along each row being commonly connected together with a predetermined reset pulse being applied to the gate terminals, and terminals on one end of the selection MOS transistors of the pixels along each column being commonly connected together to form a signal line, wherein a shutter reset operation is performeType: GrantFiled: September 28, 2000Date of Patent: August 31, 2004Assignee: Sharp Kabushiki KaishaInventor: Hiroaki Kudo
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Patent number: 6023293Abstract: In the active type solid-state imaging device of the present invention, the image sensor portion and the driving circuit portion which drives the image sensor portion or conducts signal processing are formed in separate semiconductor regions in the identical semiconductor substrate.Type: GrantFiled: March 7, 1997Date of Patent: February 8, 2000Assignee: Sharp Kabushiki KaishaInventors: Takashi Watanabe, Hiroaki Kudo
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Patent number: 5998818Abstract: The amplification type solid-state imaging device of this invention includes amplification type photoelectric converting elements arranged in a matrix.Type: GrantFiled: January 20, 1998Date of Patent: December 7, 1999Assignee: Sharp Kabushiki KaishaInventors: Kazuya Kumagai, Hiroaki Kudo
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Patent number: 5861645Abstract: An amplifying type solid-state imaging device having a transistor formed on a semiconductor base and a charge release portion which stores a signal charge which is generated by light incident on the transistor and outputs a change of an electrical signal in accordance with the stored charge. The transistor includes: a first gate region including a portion for storing the signal charge therein and a first gate electrode formed on the semiconductor base surface; and a source and a drain formed of impurity layers of a higher concentration than the semiconductor base concentration. The charge release portion includes: a second gate region including a portion in the vicinity of the semiconductor base surface, and a second gate electrode formed via an insulating film on the semiconductor base surface; and a drain for charge discharge formed of an impurity layer of a higher concentration than the semiconductor base concentration.Type: GrantFiled: February 4, 1997Date of Patent: January 19, 1999Assignee: Sharp Kabushiki KaishaInventors: Hiroaki Kudo, Takashi Watanabe
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Patent number: 5856686Abstract: An amplifying type solid-state imaging apparatus includes an amplifying type photoelectric conversion device. The device including a transistor for accumulating a charge generated by incident light as a signal charge in a charge accumulation region proximate to the surface of the semiconductor substrate and for outputting a signal in accordance with the accumulated signal charge, and a resetting section provided adjacent to the transistor for performing a resetting operation. The signal charge accumulated in the transistor is discharged from the charge accumulation region based on an applied voltage.Type: GrantFiled: March 13, 1997Date of Patent: January 5, 1999Assignee: Sharp Kabushiki KaishaInventors: Takashi Watanabe, Hiroaki Kudo
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Patent number: 5780884Abstract: The amplification type solid-state imaging device of this invention includes amplification type photoelectric converting elements arranged in a matrix.Type: GrantFiled: November 6, 1996Date of Patent: July 14, 1998Assignee: Sharp Kabushiki KaishaInventors: Kazuya Kumagai, Hiroaki Kudo
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Patent number: 5712497Abstract: An amplifying type photoelectric converting device is disclosed. The device includes: a semiconductor substrate of a first conductive type; a well portion of a second conductive type for accumulating signal charges generated by photoelectric conversion; a semiconductor region of the first conductive type provided in a region in the well portion; a first gate region including a first electrode; and a second gate region being adjacent to the first gate region and including a second electrode. An active element is formed between the semiconductor region and the semiconductor substrate, and a change in an operational characteristic of the active element which is generated by the signal charges is used as an output signal.Type: GrantFiled: March 7, 1996Date of Patent: January 27, 1998Assignee: Sharp Kabushiki KaishaInventors: Takashi Watanabe, Hiroaki Kudo
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Patent number: 5654557Abstract: A quantum wire structure includes a first layer having a thickness sufficiently smaller than a de Broglie wavelength of an electron wave in a medium, a second layer and a third layer which are disposed on and under the first layer and respectively have a forbidden band width larger than that of the first layer, wherein the first layer has a region with a relatively small curvature and a region with a relatively large curvature in its cross-section, and a width of the region with a relatively small curvature is 50 nm or less.Type: GrantFiled: May 25, 1994Date of Patent: August 5, 1997Assignees: Sharp Kabushiki Kaisha, Optoelectronics Technology Research LaboratoryInventors: Mototaka Taneya, Hiroaki Kudo, Satoshi Sugahara, Haruhisa Takiguchi
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Patent number: 5361271Abstract: A semiconductor laser of the present invention includes: a semiconductor substrate, a multi-layered structure formed on the semiconductor substrate and a current and light confining section formed on the multi-layered structure, wherein the current and light confining section includes at least two multi-layered current and light confining portions each having a laser beam transmission layer and a laser beam absorption layer formed on the laser beam transmission layer, and at least one stripe groove which spatially separates the at least two current and light confining portions; wherein an equivalent refractive index in the multi-layered current and light confining portions with respect to a laser beam in a fundamental transverse mode is made smaller than that within the stripe groove; wherein the multi-layered structure includes an active layer, and the active layer has a region positioned below the stripe groove of the current and light confining section and regions positioned below a respective one of the mType: GrantFiled: September 13, 1993Date of Patent: November 1, 1994Assignee: Sharp Kabushiki KaishaInventors: Haruhisa Takiguchi, Kazuhiko Inoguchi, Hiroaki Kudo, Satoshi Sugahara, Mototaka Taneya
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Patent number: 5345460Abstract: A semiconductor laser device with window regions according to the present invention is provided, in which a double hetero structure including cladding layers and an active layer sandwiched by the cladding layers is formed on a semiconductor substrate, the double hetero structure is buried in burying layers with a bandgap larger than that of the active layer, and the burying layers form window regions situated at both end facets of the double hetero structure, wherein the window regions have a waveguide structure including a plurality of semiconductor layers with different bandgaps.Type: GrantFiled: September 4, 1992Date of Patent: September 6, 1994Assignee: Sharp Kabushiki KaishaInventors: Haruhisa Takiguchi, Seiki Yano, Kazuhiko Inoguchi, Hiroaki Kudo, Chitose Nakanishi, Toshiyuki Okumura, Satoshi Sugahara
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Patent number: 5309472Abstract: A semiconductor device includes a multiple layer structure including a substantially flat active layer, and a first semiconductor layer and a second semiconductor layer adjacent to each other, the semiconductor layers having a corrugation at an interface therebetween; and a generating device which is connected to the multiple layer structure. An electromagnetic field intensity distribution is generated by use of the generating device in a waveguide region including the active layer, and the active layer includes a gain distribution having a distribution pattern corresponding to the corrugation. The multiple layer structure is produced by forming the corrugation on an upper surface of the first semiconductor layer, and forming the rest of the multiple layer structure including the second semiconductor layer and the active layer by using a vapor phase growth method once so as to make the active layer substantially flat. Then, the generating device is formed to be in contact with the multiple layer structure.Type: GrantFiled: June 24, 1992Date of Patent: May 3, 1994Assignee: Sharp Kabushiki KaishaInventors: Hiroaki Kudo, Kazuhiko Inoguchi, Satoshi Sugahara, Haruhisa Takiguchi
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Patent number: 5303255Abstract: A distributed feedback semiconductor laser device comprising a current blocking structure having a stripe groove, and a diffraction grating formed in the bottom of the stripe groove. The current blocking structure is formed over an active layer for laser oscillation, and it includes an etch stop layer against a groove etching in a lower potion of the current blocking structure. The refractive index distribution in transverse directions inside the stripe groove is controlled by the thickness of the optical guiding layer, enabling oscillation of the fundamental transverse mode.Type: GrantFiled: June 29, 1993Date of Patent: April 12, 1994Assignee: Sharp Kabushiki KaishaInventors: Hiroaki Kudo, Haruhisa Takiguchi, Kazuhiko Inoguchi, Chitose Nakanishi, Satoshi Sugahara
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Patent number: 5292685Abstract: In a first crystal growth step, a first cladding layer, an active layer, and an optical wave-guide layer are sequentially grown on a semiconductor substrate. A diffraction grating is formed at a surface of the optical waveguide layer. In a second crystal growth step, a current block layer is grown on the optical waveguide layer having the diffraction grating. The current block layer is selectively etched to expose the diffraction grating and thus to form a stripe groove. In a third crystal growth step, a second cladding layer is grown on the diffraction grating inside the stripe groove and on the current block layer.Type: GrantFiled: July 24, 1992Date of Patent: March 8, 1994Assignee: Sharp Kabushiki KaishaInventors: Kazuhiko Inoguchi, Satoshi Sugahara, Mototaka Taneya, Hiroaki Kudo, Chitose Nakanishi, Haruhisa Takiguchi
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Patent number: 5280493Abstract: A quantum wire laser comprises a first multi-layer structure which is formed on a substrate and includes at least one first quantum well layer sandwiched by barrier layers, a second multi-layer structure which is formed on a laminated cross-section of the first multi-layer structure and is obtained by successively laminating a first barrier layer having a band gap larger than that of the first quantum well layer, a second quantum well layer having a band gap nearly equal to that of the first quantum well layer, and a second barrier layer having a band gap larger than those of the first and second quantum well layers, wherein a region for confining electrons is disposed in at least one of regions in the vicinity of the first quantum well layer and the second quantum well layer.Type: GrantFiled: March 27, 1992Date of Patent: January 18, 1994Assignees: Sharp Kabushiki Kaisha, Optoelectronics Technology Research LaboratoryInventors: Haruhisa Takiguchi, Hiroaki Kudo, Mototaka Taneya, Satoshi Sugahara
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Patent number: 5070510Abstract: A semiconductor laser device having a mesa stripe whose side faces are facets of {111} planes is disclosed. In the laser device, a current blocking layer is formed on a semiconductor substrate whose main surface is a (100) plane, and a channel which is oriented along the <011> direction is formed in the current blocking layer. The mesa stripe is formed on the substrate within the channel by a selective growth technique. The mesa stripe has a multilayer structure including an active layer and is covered by a burying layer.Type: GrantFiled: December 10, 1990Date of Patent: December 3, 1991Assignee: Sharp Kabushiki KaishaInventors: Fumihiro Konushi, Hiroshi Nakatu, Kazuhiko Inoguchi, Toshiyuki Okumura, Akinori Seki, Haruhisa Takiguchi, Chitose Nakanishi, Satoshi Sugahara, Hiroaki Kudo
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Patent number: 5027368Abstract: A semiconductor laser device with a resonator containing an active region for laser oscillating operation is disclosed which comprises a third-order diffraction grating with a periodic corrugation for producing feedback of laser light, the corrugation being of substantially rectangular shape, wherein the ratio of the width of each convex portion of the corrugation to the periodicity of the corrugation is in the range of 0.20 to 0.25, 0.40 to 0.60, or 0.70 to 0.95.Type: GrantFiled: August 16, 1989Date of Patent: June 25, 1991Assignee: Sharp Kabushiki KaishaInventors: Hiroaki Kudo, Haruhisa Takiguchi, Chitose Sakane, Satoshi Sugahara
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Patent number: 4975922Abstract: A multi-layered dielectric film that is coated on the end surfaces or other surfaces of optical products, wherein said multi-layered dielectric film is composed of alternate layers consisting of two kinds of dielectric layer, one of which is a first dielectric layer of TiO.sub.2 or ZnS with a high refractive index n.sub.1 and the other of which is a second dielectric layer of Al.sub.2 O.sub.3 with a low refractive index n.sub.2.Type: GrantFiled: June 19, 1989Date of Patent: December 4, 1990Assignee: Sharp Kabushiki KaishaInventors: Chitose Sakane, Haruhisa Takiguchi, Hiroaki Kudo, Satoshi Sugahara
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Patent number: 4941148Abstract: A semiconductor laser element of the present invention provides a double hetero junction structure having two clad layers and an active layer formed between the two clad layers. High resistance regions are formed vertically to the light propagating direction at almost the same interval as the light wavelength in at least one of the two clad layers. The high resistance regions form a periodic current blocking structure so the semiconductor laser element may oscillate in a single longitudinal mode even in a non-steady state operation.Type: GrantFiled: November 12, 1987Date of Patent: July 10, 1990Assignee: Sharp Kabushiki KaishaInventors: Toshihiko Yoshida, Haruhisa Takiguchi, Shinji Kaneiwa, Hiroaki Kudo
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Patent number: 4910744Abstract: A semiconductor laser device comprising a semiconductor substrate, an active layer having a refractive index greater than that of said substrate and having an energy gap smaller than that of said substrate, and a cladding layer having a conductivity type different from that of said substrate, in that order, resulting in a double-heterostructure, wherein two parallel grooves with a given distance therebetween are disposed in the double-heterostructure so as to reach said substrate and a first burying layer having the same conductivity type as said substrate, a second burying layer having a conductivity type different from that of said substrate and a third burying layer having the same conductivity type as said substrate are disposed outside of the two grooves in that order, and moreover a semiconductor layer with the flat surface having a conductivity type different from that of said substrate is disposed over the third burying layer and the area positioned between the two parallel grooves.Type: GrantFiled: December 8, 1987Date of Patent: March 20, 1990Assignee: Sharp Kabushiki KaishaInventors: Toshihiko Yoshida, Haruhisa Takiguchi, Shinji Kaneiwa, Hiroaki Kudo