Patents by Inventor Hiroaki Kudo

Hiroaki Kudo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240120499
    Abstract: An electrode according to an embodiment includes a support, and a catalyst layer including a sheet layer and a gap layer stacked, alternately on the support. The catalyst layer includes noble oxide and non-noble oxide. 4 [wt %] or more and 8 [wt %] or less of metal elements included in the catalyst layer is non-noble metal. An average thickness of the gap layer is 6 [nm] or more and 50 [nm] or less.
    Type: Application
    Filed: September 6, 2023
    Publication date: April 11, 2024
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ENERGY SYSTEMS & SOLUTIONS CORPORATION
    Inventors: Norihiro YOSHINAGA, Hyangmi JUNG, Taishi FUKAZAWA, Yoshihiko NAKANO, Hiroaki HIRAZAWA, Yoshitsune SUGANO, Yuki KUDO, Akihiko ONO
  • Patent number: 11938739
    Abstract: An ink refill container includes a container main body including an ink storage chamber, an ink outlet-forming portion provided on an end portion of the container main body forming an ink outlet that allows the ink to flow out from the ink storage chamber, and a valve provided in the ink outlet-forming portion configured to openably seal the ink outlet, in which the ink outlet-forming portion includes a positioning portion on an outer side of the ink outlet-forming portion. in which the positioning portion is closer to the container main body than the valve is to the container main body in a central axis direction of the ink outlet, and in which the positioning portion partially abuts against an ink tank when the valve is opened for refilling the ink to the ink tank, to thereby position the valve relative to the ink tank.
    Type: Grant
    Filed: March 15, 2023
    Date of Patent: March 26, 2024
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Tadahiro Mizutani, Ryoichi Tanaka, Manabu Akahane, Makoto Kobayashi, Naomi Kimura, Hideki Okumura, Shoma Kudo, Tetsuya Takamoto, Hiroaki Sakai
  • Publication number: 20240090329
    Abstract: A compound includes: at least one group represented by a formula (11) below; and a single benz[de]anthracene derivative skeleton represented by a formula (1000) below in a molecule, in which Ar1 is a substituted or unsubstituted aryl group including at least four rings, at least one of R10 to R19 is a group represented by the formula (11), L1 is a substituted or unsubstituted arylene group having 6 to 15 ring carbon atoms or a substituted or unsubstituted divalent heterocyclic group having 5 to 15 ring atoms, and mx is 1, 2, or 3.
    Type: Application
    Filed: October 1, 2021
    Publication date: March 14, 2024
    Applicant: IDEMITSU KOSAN CO.,LTD.
    Inventors: Hiroaki ITOI, Yuki NAKANO, Taro YAMAKI, Maiko IIDA, Takamoto MORITA, Shintaro BAN, Ryota TAKAHASHI, Yu KUDO, Yoshinao SHIRASAKI
  • Publication number: 20230193171
    Abstract: A beer beverage comprising 4-vinyl phenol (4VP) and 4-vinyl guaiacol (4VG) in the 4VG:4VP weight ratio of from 2.5-10, the overall weight proportion of 4VG and 4VP in the beverage being from 0.1 ppm to 0.6 ppm. The compounds provide desirable beer flavor characteristics to both beers and non-alcoholic beer beverages deficient in these characteristics.
    Type: Application
    Filed: May 11, 2021
    Publication date: June 22, 2023
    Inventors: Chisato MAYAMA, Hiroaki KUDO, Yohei MIYAMOTO
  • Patent number: 6784931
    Abstract: An amplification type solid state imaging device of the present invention includes a plurality of pixels arranged in a matrix each of which includes: a photodiode for photoelectric conversion; a signal amplification MOS transistor which functions as an amplifier for amplifying a change in the potential of the photodiode; a pixel selection MOS transistor; and a reset MOS transistor for resetting the potential of the photodiode to a predetermined initial potential, gate terminals of the selection MOS transistors of the pixels along each row being commonly connected together with a predetermined signal read pulse being applied to the gate terminals, gate terminals of the reset MOS transistors of the pixels along each row being commonly connected together with a predetermined reset pulse being applied to the gate terminals, and terminals on one end of the selection MOS transistors of the pixels along each column being commonly connected together to form a signal line, wherein a shutter reset operation is performe
    Type: Grant
    Filed: September 28, 2000
    Date of Patent: August 31, 2004
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Hiroaki Kudo
  • Patent number: 6023293
    Abstract: In the active type solid-state imaging device of the present invention, the image sensor portion and the driving circuit portion which drives the image sensor portion or conducts signal processing are formed in separate semiconductor regions in the identical semiconductor substrate.
    Type: Grant
    Filed: March 7, 1997
    Date of Patent: February 8, 2000
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Takashi Watanabe, Hiroaki Kudo
  • Patent number: 5998818
    Abstract: The amplification type solid-state imaging device of this invention includes amplification type photoelectric converting elements arranged in a matrix.
    Type: Grant
    Filed: January 20, 1998
    Date of Patent: December 7, 1999
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kazuya Kumagai, Hiroaki Kudo
  • Patent number: 5861645
    Abstract: An amplifying type solid-state imaging device having a transistor formed on a semiconductor base and a charge release portion which stores a signal charge which is generated by light incident on the transistor and outputs a change of an electrical signal in accordance with the stored charge. The transistor includes: a first gate region including a portion for storing the signal charge therein and a first gate electrode formed on the semiconductor base surface; and a source and a drain formed of impurity layers of a higher concentration than the semiconductor base concentration. The charge release portion includes: a second gate region including a portion in the vicinity of the semiconductor base surface, and a second gate electrode formed via an insulating film on the semiconductor base surface; and a drain for charge discharge formed of an impurity layer of a higher concentration than the semiconductor base concentration.
    Type: Grant
    Filed: February 4, 1997
    Date of Patent: January 19, 1999
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hiroaki Kudo, Takashi Watanabe
  • Patent number: 5856686
    Abstract: An amplifying type solid-state imaging apparatus includes an amplifying type photoelectric conversion device. The device including a transistor for accumulating a charge generated by incident light as a signal charge in a charge accumulation region proximate to the surface of the semiconductor substrate and for outputting a signal in accordance with the accumulated signal charge, and a resetting section provided adjacent to the transistor for performing a resetting operation. The signal charge accumulated in the transistor is discharged from the charge accumulation region based on an applied voltage.
    Type: Grant
    Filed: March 13, 1997
    Date of Patent: January 5, 1999
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Takashi Watanabe, Hiroaki Kudo
  • Patent number: 5780884
    Abstract: The amplification type solid-state imaging device of this invention includes amplification type photoelectric converting elements arranged in a matrix.
    Type: Grant
    Filed: November 6, 1996
    Date of Patent: July 14, 1998
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kazuya Kumagai, Hiroaki Kudo
  • Patent number: 5712497
    Abstract: An amplifying type photoelectric converting device is disclosed. The device includes: a semiconductor substrate of a first conductive type; a well portion of a second conductive type for accumulating signal charges generated by photoelectric conversion; a semiconductor region of the first conductive type provided in a region in the well portion; a first gate region including a first electrode; and a second gate region being adjacent to the first gate region and including a second electrode. An active element is formed between the semiconductor region and the semiconductor substrate, and a change in an operational characteristic of the active element which is generated by the signal charges is used as an output signal.
    Type: Grant
    Filed: March 7, 1996
    Date of Patent: January 27, 1998
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Takashi Watanabe, Hiroaki Kudo
  • Patent number: 5654557
    Abstract: A quantum wire structure includes a first layer having a thickness sufficiently smaller than a de Broglie wavelength of an electron wave in a medium, a second layer and a third layer which are disposed on and under the first layer and respectively have a forbidden band width larger than that of the first layer, wherein the first layer has a region with a relatively small curvature and a region with a relatively large curvature in its cross-section, and a width of the region with a relatively small curvature is 50 nm or less.
    Type: Grant
    Filed: May 25, 1994
    Date of Patent: August 5, 1997
    Assignees: Sharp Kabushiki Kaisha, Optoelectronics Technology Research Laboratory
    Inventors: Mototaka Taneya, Hiroaki Kudo, Satoshi Sugahara, Haruhisa Takiguchi
  • Patent number: 5361271
    Abstract: A semiconductor laser of the present invention includes: a semiconductor substrate, a multi-layered structure formed on the semiconductor substrate and a current and light confining section formed on the multi-layered structure, wherein the current and light confining section includes at least two multi-layered current and light confining portions each having a laser beam transmission layer and a laser beam absorption layer formed on the laser beam transmission layer, and at least one stripe groove which spatially separates the at least two current and light confining portions; wherein an equivalent refractive index in the multi-layered current and light confining portions with respect to a laser beam in a fundamental transverse mode is made smaller than that within the stripe groove; wherein the multi-layered structure includes an active layer, and the active layer has a region positioned below the stripe groove of the current and light confining section and regions positioned below a respective one of the m
    Type: Grant
    Filed: September 13, 1993
    Date of Patent: November 1, 1994
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Haruhisa Takiguchi, Kazuhiko Inoguchi, Hiroaki Kudo, Satoshi Sugahara, Mototaka Taneya
  • Patent number: 5345460
    Abstract: A semiconductor laser device with window regions according to the present invention is provided, in which a double hetero structure including cladding layers and an active layer sandwiched by the cladding layers is formed on a semiconductor substrate, the double hetero structure is buried in burying layers with a bandgap larger than that of the active layer, and the burying layers form window regions situated at both end facets of the double hetero structure, wherein the window regions have a waveguide structure including a plurality of semiconductor layers with different bandgaps.
    Type: Grant
    Filed: September 4, 1992
    Date of Patent: September 6, 1994
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Haruhisa Takiguchi, Seiki Yano, Kazuhiko Inoguchi, Hiroaki Kudo, Chitose Nakanishi, Toshiyuki Okumura, Satoshi Sugahara
  • Patent number: 5309472
    Abstract: A semiconductor device includes a multiple layer structure including a substantially flat active layer, and a first semiconductor layer and a second semiconductor layer adjacent to each other, the semiconductor layers having a corrugation at an interface therebetween; and a generating device which is connected to the multiple layer structure. An electromagnetic field intensity distribution is generated by use of the generating device in a waveguide region including the active layer, and the active layer includes a gain distribution having a distribution pattern corresponding to the corrugation. The multiple layer structure is produced by forming the corrugation on an upper surface of the first semiconductor layer, and forming the rest of the multiple layer structure including the second semiconductor layer and the active layer by using a vapor phase growth method once so as to make the active layer substantially flat. Then, the generating device is formed to be in contact with the multiple layer structure.
    Type: Grant
    Filed: June 24, 1992
    Date of Patent: May 3, 1994
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hiroaki Kudo, Kazuhiko Inoguchi, Satoshi Sugahara, Haruhisa Takiguchi
  • Patent number: 5303255
    Abstract: A distributed feedback semiconductor laser device comprising a current blocking structure having a stripe groove, and a diffraction grating formed in the bottom of the stripe groove. The current blocking structure is formed over an active layer for laser oscillation, and it includes an etch stop layer against a groove etching in a lower potion of the current blocking structure. The refractive index distribution in transverse directions inside the stripe groove is controlled by the thickness of the optical guiding layer, enabling oscillation of the fundamental transverse mode.
    Type: Grant
    Filed: June 29, 1993
    Date of Patent: April 12, 1994
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hiroaki Kudo, Haruhisa Takiguchi, Kazuhiko Inoguchi, Chitose Nakanishi, Satoshi Sugahara
  • Patent number: 5292685
    Abstract: In a first crystal growth step, a first cladding layer, an active layer, and an optical wave-guide layer are sequentially grown on a semiconductor substrate. A diffraction grating is formed at a surface of the optical waveguide layer. In a second crystal growth step, a current block layer is grown on the optical waveguide layer having the diffraction grating. The current block layer is selectively etched to expose the diffraction grating and thus to form a stripe groove. In a third crystal growth step, a second cladding layer is grown on the diffraction grating inside the stripe groove and on the current block layer.
    Type: Grant
    Filed: July 24, 1992
    Date of Patent: March 8, 1994
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kazuhiko Inoguchi, Satoshi Sugahara, Mototaka Taneya, Hiroaki Kudo, Chitose Nakanishi, Haruhisa Takiguchi
  • Patent number: 5280493
    Abstract: A quantum wire laser comprises a first multi-layer structure which is formed on a substrate and includes at least one first quantum well layer sandwiched by barrier layers, a second multi-layer structure which is formed on a laminated cross-section of the first multi-layer structure and is obtained by successively laminating a first barrier layer having a band gap larger than that of the first quantum well layer, a second quantum well layer having a band gap nearly equal to that of the first quantum well layer, and a second barrier layer having a band gap larger than those of the first and second quantum well layers, wherein a region for confining electrons is disposed in at least one of regions in the vicinity of the first quantum well layer and the second quantum well layer.
    Type: Grant
    Filed: March 27, 1992
    Date of Patent: January 18, 1994
    Assignees: Sharp Kabushiki Kaisha, Optoelectronics Technology Research Laboratory
    Inventors: Haruhisa Takiguchi, Hiroaki Kudo, Mototaka Taneya, Satoshi Sugahara
  • Patent number: 5070510
    Abstract: A semiconductor laser device having a mesa stripe whose side faces are facets of {111} planes is disclosed. In the laser device, a current blocking layer is formed on a semiconductor substrate whose main surface is a (100) plane, and a channel which is oriented along the <011> direction is formed in the current blocking layer. The mesa stripe is formed on the substrate within the channel by a selective growth technique. The mesa stripe has a multilayer structure including an active layer and is covered by a burying layer.
    Type: Grant
    Filed: December 10, 1990
    Date of Patent: December 3, 1991
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Fumihiro Konushi, Hiroshi Nakatu, Kazuhiko Inoguchi, Toshiyuki Okumura, Akinori Seki, Haruhisa Takiguchi, Chitose Nakanishi, Satoshi Sugahara, Hiroaki Kudo
  • Patent number: 5027368
    Abstract: A semiconductor laser device with a resonator containing an active region for laser oscillating operation is disclosed which comprises a third-order diffraction grating with a periodic corrugation for producing feedback of laser light, the corrugation being of substantially rectangular shape, wherein the ratio of the width of each convex portion of the corrugation to the periodicity of the corrugation is in the range of 0.20 to 0.25, 0.40 to 0.60, or 0.70 to 0.95.
    Type: Grant
    Filed: August 16, 1989
    Date of Patent: June 25, 1991
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hiroaki Kudo, Haruhisa Takiguchi, Chitose Sakane, Satoshi Sugahara