Patents by Inventor Hiroaki Morimoto

Hiroaki Morimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9007641
    Abstract: An information processing apparatus instructs a printing apparatus to stop print processing for a print command to be processed by the printing apparatus via a universal serial bus, if status information indicating a status of the printing apparatus indicates that the printing apparatus is in a state where the print processing cannot be continued, wherein the print command is generated by a printer driver configured not to include a language monitor.
    Type: Grant
    Filed: January 6, 2014
    Date of Patent: April 14, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventor: Hiroaki Morimoto
  • Publication number: 20140192376
    Abstract: An information processing apparatus instructs a printing apparatus to stop print processing for a print command to be processed by the printing apparatus via a universal serial bus, if status information indicating a status of the printing apparatus indicates that the printing apparatus is in a state where the print processing cannot be continued, wherein the print command is generated by a printer driver configured not to include a language monitor.
    Type: Application
    Filed: January 6, 2014
    Publication date: July 10, 2014
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Hiroaki Morimoto
  • Publication number: 20130300325
    Abstract: Energization to armature windings of a brushless motor in a driven state is interrupted when an energization pattern of the energization shifts to a specific energization pattern determined in advance among a plurality of energization patterns to stop the brushless motor. Also, the brushless motor that has been stopped is started by energizing the armature windings of the brushless motor in the specific energization pattern.
    Type: Application
    Filed: September 13, 2012
    Publication date: November 14, 2013
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hiroshi AIZAWA, Hiroaki MORIMOTO
  • Patent number: 8106915
    Abstract: A display control circuit capable of performing arbitration with the use of a simple configuration. The display control circuit exchanges, with a plurality of masters, attribute information defining conditions for displaying video on a display, and includes a memory for storing the attribute information, a plurality of channels associated with the respective masters for accepting, from the masters, access requests to access the memory, and an arbitration controller configured by hardware. The arbitration controller arbitrates the access requests accepted via the respective channels and permits a selected one of the access requests to access the memory.
    Type: Grant
    Filed: May 12, 2008
    Date of Patent: January 31, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Shintarou Kawano, Kazutoshi Tanimoto, Hiroaki Morimoto
  • Publication number: 20080313377
    Abstract: A display control circuit capable of performing arbitration with the use of a simple configuration. The display control circuit exchanges, with a plurality of masters, attribute information defining conditions for displaying video on a display, and includes a memory for storing the attribute information, a plurality of channels associated with the respective masters for accepting, from the masters, access requests to access the memory, and an arbitration controller configured by hardware. The arbitration controller arbitrates the access requests accepted via the respective channels and permits a selected one of the access requests to access the memory.
    Type: Application
    Filed: May 12, 2008
    Publication date: December 18, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Shintarou KAWANO, Kazutoshi TANIMOTO, Hiroaki MORIMOTO
  • Patent number: 7227339
    Abstract: The present invention relates to a power generation controller of a vehicle power generator, which includes: voltage detection means for sampling a voltage of a battery based on a reference clock signal; duty range setting means for setting a range for an ON/OFF ratio of a field switching element from the rotation speed of the power generator; control duty computation means for computing the ON/OFF ratio of the field switching element based on thus set duty range from a deviation between a power generation target voltage and voltage information as a result of sampling; and field PWM drive means for controlling the ON/OFF switching operation of the field switching element with an interval based on the reference clock signal from the computed ON/OFF ratio.
    Type: Grant
    Filed: March 30, 2005
    Date of Patent: June 5, 2007
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Masaru Kobayashi, Kiyoharu Anzai, Hiroaki Morimoto
  • Publication number: 20060026331
    Abstract: A data transfer device for preventing a PCI-X bus from hanging up, which can be caused when a sender of data aborts. An abort signal-receiving section receives an abort signal delivered by the sender of data when the sender aborts. When the abort signal-receiving section receives the abort signal, a dummy data-generating section generates dummy data. When the abort signal-receiving section receives the abort signal, an erroneous parity data-generating section generates erroneous parity data for indicating that the dummy data generated by the dummy data-generating section is a dummy. A data-transmitting section transmits the dummy data generated by the dummy data-generating section and the erroneous parity data generated by the erroneous parity data-generating section, to a recipient of the data via the PCI-X bus.
    Type: Application
    Filed: November 30, 2004
    Publication date: February 2, 2006
    Inventors: Seiji Kikuchi, Masahiro Tsuchibuchi, Noboru Nishimura, Hiroaki Morimoto
  • Publication number: 20050218815
    Abstract: The present invention relates to a power generation controller of a vehicle power generator, which includes: voltage detection means for sampling a voltage of a battery based on a reference clock signal; duty range setting means for setting a range for an ON/OFF ratio of a field switching element from the rotation speed of the power generator; control duty computation means for computing the ON/OFF ratio of the field switching element based on thus set duty range from a deviation between a power generation target voltage and voltage information as a result of sampling; and field PWM drive means for controlling the ON/OFF switching operation of the field switching element with an interval based on the reference clock signal from the computed ON/OFF ratio.
    Type: Application
    Filed: March 30, 2005
    Publication date: October 6, 2005
    Inventors: Masaru Kobayashi, Kiyoharu Anzai, Hiroaki Morimoto
  • Publication number: 20030068465
    Abstract: A tufted carpet included a backing bonded to a tufted base with a layer of adhesive containing powder of a far-infrared radiating material. The adhesive layer not only prevents water on the upper surface of the carpet from penetrating through the carpet to the bottom of the carpet, but also warms the carpet so that the water can be evaporated.
    Type: Application
    Filed: September 27, 2002
    Publication date: April 10, 2003
    Inventors: Hiroaki Morimoto, Yasunobu Nakagoshi
  • Patent number: 5306663
    Abstract: A method of wiring a semiconductor device which allows a manufacturing step to be simplified without deteriorating an insulation characteristic of an aerial wiring. The semiconductor device wiring apparatus formed thereby includes a first beam column 1a disposed above a substrate 50 and a second beam column 1b disposed horizontally thereto. A wiring portion of the aerial wiring to be formed upwardly is formed by using the first beam column 1a and a wiring portion to be formed horizontally to wiring layer of the substrate 50 is formed by using the second beram column, which results in that no insulating film for the aerial wiring is required to simplify manufacturing steps.
    Type: Grant
    Filed: April 27, 1992
    Date of Patent: April 26, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Hiroaki Morimoto
  • Patent number: 5273935
    Abstract: Accurate etching control using focused ion beams can be achieved if the etching is performed in accordance with a detection signal obtained by detecting an electric current passing from a semiconductor device to ground or secondary electrons generated when the charged beams are spirally applied to a predetermined area during the charged-beam scanning operation. Therefore, the end point of the process can be accurately detected and uniform processing results can be obtained. As a result, precise etching control can be performed and a reliable semiconductor device can be manufactured.
    Type: Grant
    Filed: March 29, 1990
    Date of Patent: December 28, 1993
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hiroaki Morimoto, Hiroshi Onoda
  • Patent number: 5149973
    Abstract: Disclosed are an apparatus for wiring a semiconductor device and a wiring method therefor which allow a manufacturing step to be simplified without deteriorating an insulation characteristic of an aerial wiring. The semiconductor device wiring apparatus includes a first beam column 1a disposed above a substrate 50 and a second beam column 1b disposed horizontally thereto. Therefore, a wiring portion of the aerial wiring to be formed upwardly is formed by using the first beam column 1a and a wiring portion to be formed horizontally to wiring layer of the substrate 50 is formed by using the second beam column, which results in that no insulating film for the aerial wiring is required to simplify manufacturing steps.
    Type: Grant
    Filed: June 28, 1991
    Date of Patent: September 22, 1992
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Hiroaki Morimoto
  • Patent number: 5141880
    Abstract: In a manufacturing method of a junction gate field effect transistor, impurities of a first conductivity type are first implanted at a predetermined concentration into a monocrystal silicon layer separately formed on a region to be used as an active region in an insulating layer, and then surfaces of the monocrystal silicon layer and an insulating substrate are covered with a silicon oxide film. Then, impurities of a second conductivity type are implanted at a predetermined concentration into a portion to be used as a gate electrode in a monocrystal silicon layer by a focused ion beam method, and metal ions are implanted at a predetermined concentration into a portion to be used as a gate electrode of the silicon oxide film covering the monocrystal silicon layer by the focused ion beam method.
    Type: Grant
    Filed: March 12, 1991
    Date of Patent: August 25, 1992
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yasuo Inoue, Hiroaki Morimoto
  • Patent number: 5043290
    Abstract: A process for forming electrodes for semiconductor devices having a semiconductor substrate and an electrically conductive portion covered and protected by an electrically insulating coating. The process includes the steps of forming an electrically conductive film on the electrically insulating coating, forming an electrode to be connected to an external circuit on the electrically conductive film at a position overlying the electrically conductive portion by exposing portions of the electrically insulating coating and the first electrically conductive film to a converged ion beam, electrically connecting the electrode to the exposed portions of the electrically conductive film, and removing the portions of the electrically conductive film not covered by the electrode. As a result, the likelihood of breakdown of the internal circuit of the semiconductor device connected to the electrically conductive portion while the electrode is being formed is greatly reduced.
    Type: Grant
    Filed: April 14, 1989
    Date of Patent: August 27, 1991
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tadashi Nishioka, Yoji Mashiko, Hiroaki Morimoto, Hiroshi Koyama
  • Patent number: 4962059
    Abstract: A process for forming electrodes for semiconductor devices having a semiconductor substrate and an electrically conductive portion covered and protected by an electrically insulating coating. The process includes the steps of forming an electrically conductive film on the electrically insulating coating, forming an electrode to be connected to an external circuit on the electrically conductive film at a position overlying the electrically conductive portion by exposing portions of the electrically insulating coating and the first electrically conductive film to a converged ion beam, electrically connecting the electrode to the exposed portions of the electrically conductive film, and removing the portions of the electrically conductive film not covered by the electrode. As a result, the likelihood of breakdown of the internal circuit of the semiconductor device connected to the electrically conductive portion while the electrode is being formed is greatly reduced.
    Type: Grant
    Filed: April 14, 1989
    Date of Patent: October 9, 1990
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tadashi Nishioka, Yoji Mashiko, Hiroaki Morimoto, Hiroshi Koyama
  • Patent number: 4952421
    Abstract: The method for repairing the pattern is to repair the lacking portion of the pattern included in the X-ray exposure mask with the WF.sub.6 gas being filled in the vicinity thereof, wherein the focused ion beam irradiates the defect portion, whereby the WF.sub.6 gas is decomposed to form a tungsten thin film so as to at least fill the lacking portion. On this occasion, the focused ion beam is successively applied so that it is always in contact with the edge of the tungsten thin film constituting the pattern.
    Type: Grant
    Filed: November 8, 1988
    Date of Patent: August 28, 1990
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hiroaki Morimoto, Hiroshi Onoda, Tadashi Nishioka
  • Patent number: 4948749
    Abstract: A process for forming electrodes for semiconductor devices having a semiconductor substrate and an electrically conductive portion covered and protected by an electrically insulating coating. The process includes the steps of forming an electrically conductive film on the electrically insulating coating, forming an electrode to be connected to an external circuit on the electrically conductive film at a position overlying the electrically conductive portion by exposing portions of the electrically insulating coating and the first electrically conductive film to a converged ion beam, electrically connectig the electrode to the exposed portions of the electrically conductive film, and removing the portions of the electrically conductive film not covered by the electrode. As a result, the likelihood of breakdown of the internal circuit of the semiconductor device connected to the electrically conductive portion while the electrode is being formed is greatly reduced.
    Type: Grant
    Filed: April 14, 1989
    Date of Patent: August 14, 1990
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tadashi Nishioka, Yoji Mashiko, Hiroaki Morimoto, Hiroshi Koyama
  • Patent number: 4873163
    Abstract: A photomask material according to the present invention comprises a transparent substrate and a silicide film of a transition metal formed on the transparent substrate.
    Type: Grant
    Filed: August 8, 1988
    Date of Patent: October 10, 1989
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yaichiro Watakabe, Hiroaki Morimoto, Tatsuo Okamoto
  • Patent number: 4853341
    Abstract: A process for forming electrodes for semiconductor devices having a semiconductor substrate and an electrically conductive portion covered and protected by an electrically insulating coating. The process including the steps of forming an electrically conductive film on the electrically insulating coating, forming an electrode to be connected to an external circuit on the electrically conductive film at a position overlying the electrically conductive portion by exposing portions of the electrically insulating coating and the first electrically conductive film to a converged ion beam, electrically connecting the electrode to the exposed portions of the electrically conductive film, and removing the portions of the electrically conductive film not covered by the electrode. As a result, the likelihood of breakdown of the internal circuit of the semiconductor device connected to the electrically conductive portion while the electrode is being formed in greatly reduced.
    Type: Grant
    Filed: November 9, 1987
    Date of Patent: August 1, 1989
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tadashi Nishioka, Yoji Mashiko, Hiroaki Morimoto, Hiroshi Koyama
  • Patent number: 4843238
    Abstract: In a method for identifying blistered film in layered films, a focused ion beam irradiates the approximate center of the blister and a portion which has no blister, and individual sets of the measurement data relating to the respective numbers of secondary electrons generated by the irradiation are compared to determine which film of layered films has blistered. Since the focused ion beam is employed, the present method is applicable to the detection of a small blister in layered films. Furthermore, since an enormous number of cutting operations as might have been required in the prior art are eliminated, the present method can be carried out, stably, positively and economically.
    Type: Grant
    Filed: February 11, 1988
    Date of Patent: June 27, 1989
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tadashi Nishioka, Hiroaki Morimoto, Yoji Mashiko, Hiroshi Koyama