Patents by Inventor Hiroaki NAGASAKA

Hiroaki NAGASAKA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240101192
    Abstract: In a crawler type work machine, when switching from a pivot turning mode to a straight travel mode or a slow turning mode, a controller is configured to maintain a rotation speed of the turning motor until after a first timing at which the inside steering clutch begins partial engagement.
    Type: Application
    Filed: December 15, 2021
    Publication date: March 28, 2024
    Inventors: Takeshi YOSHIKAWA, Hiroaki TAKESHIMA, Naoya AKIYAMA, Kazushi NAKATA, Osamu YATSUDA, Shinichi OTAKA, Yuji NAMEKI, Ryoichi NAGASAKA, Takaomi KOMURA
  • Patent number: 10127164
    Abstract: A processing device includes: a plurality of processing units that perform processes in accordance with data items read from a memory; a bus that connects the memory to the plurality of processing units; and a traffic monitor that monitors traffic on the bus with respect to the plurality of processing units, and when the traffic for one of the processing units that has been assigned access rights to the memory exceeds or reaches a prescribed upper limit, outputs a signal to the one of the processing units so as to reduce or suspend the traffic for the one of the processing units.
    Type: Grant
    Filed: October 1, 2015
    Date of Patent: November 13, 2018
    Assignee: CASIO COMPUTER CO., LTD.
    Inventor: Hiroaki Nagasaka
  • Publication number: 20160132438
    Abstract: A processing device includes: a plurality of processing units that perform processes in accordance with data items read from a memory; a bus that connects the memory to the plurality of processing units; and a traffic monitor that monitors traffic on the bus with respect to the plurality of processing units, and when the traffic for one of the processing units that has been assigned access rights to the memory exceeds or reaches a prescribed upper limit, outputs a signal to the one of the processing units so as to reduce or suspend the traffic for the one of the processing units.
    Type: Application
    Filed: October 1, 2015
    Publication date: May 12, 2016
    Applicant: CASIO COMPUTER CO., LTD.
    Inventor: Hiroaki NAGASAKA
  • Patent number: 9202452
    Abstract: An address for reading, from a waveform memory connected by a bus, waveform data to be assigned to each of a plurality of sound generation channels for generating a musical sound, is calculated, by time division, for each sound generation channel, and the calculated address and the sound generation channels are associated and stored in an address memory. When the bus is in an empty state, an address stored in the address memory is read, and waveform data is read from the waveform memory based on the read address; the read waveform data is assigned to the corresponding sound generation channel, and generation of a musical sound is prescribed for the sound generation channel to which the waveform data is assigned.
    Type: Grant
    Filed: January 13, 2015
    Date of Patent: December 1, 2015
    Assignee: CASIO COMPUTER CO., LTD.
    Inventor: Hiroaki Nagasaka
  • Publication number: 20150122110
    Abstract: An address for reading, from a waveform memory connected by a bus, waveform data to be assigned to each of a plurality of sound generation channels for generating a musical sound, is calculated, by time division, for each sound generation channel, and the calculated address and the sound generation channels are associated and stored in an address memory. When the bus is in an empty state, an address stored in the address memory is read, and waveform data is read from the waveform memory based on the read address; the read waveform data is assigned to the corresponding sound generation channel, and generation of a musical sound is prescribed for the sound generation channel to which the waveform data is assigned.
    Type: Application
    Filed: January 13, 2015
    Publication date: May 7, 2015
    Applicant: CASIO COMPUTER CO., LTD.
    Inventor: Hiroaki NAGASAKA
  • Patent number: 9000284
    Abstract: An electronic musical instrument reads waveform sample data of a predetermined number of channels from memory, corresponding to an empty state of a bus, and, in a case in which reading is not completed before a corruption determination timing of each channel lapses, detects bus corruption, which is overflow of the bus, for channels in which the reading is not completed. Then, in a case in which the bus corruption is detected, the electronic musical instrument performs predetermined control such as not to generate entry data, to stop sound generation, etc. for sound generation in channels in which the reading is not completed.
    Type: Grant
    Filed: June 21, 2013
    Date of Patent: April 7, 2015
    Assignee: Casio Computer Co., Ltd.
    Inventor: Hiroaki Nagasaka
  • Patent number: 8962965
    Abstract: An address for reading, from a waveform memory connected by a bus, waveform data to be assigned to each of a plurality of sound generation channels for generating a musical sound, is calculated, by time division, for each sound generation channel, and the calculated address and the sound generation channels are associated and stored in an address memory. When the bus is in an empty state, an address stored in the address memory is read, and waveform data is read from the waveform memory based on the read address; the read waveform data is assigned to the corresponding sound generation channel, and generation of a musical sound is prescribed for the sound generation channel to which the waveform data is assigned.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: February 24, 2015
    Assignee: Casio Computer Co., Ltd.
    Inventor: Hiroaki Nagasaka
  • Publication number: 20140007754
    Abstract: An electronic musical instrument reads waveform sample data of a predetermined number of channels from memory, corresponding to an empty state of a bus, and, in a case in which reading is not completed before a corruption determination timing of each channel lapses, detects bus corruption, which is overflow of the bus, for channels in which the reading is not completed. Then, in a case in which the bus corruption is detected, the electronic musical instrument performs predetermined control such as not to generate entry data, to stop sound generation, etc. for sound generation in channels in which the reading is not completed.
    Type: Application
    Filed: June 21, 2013
    Publication date: January 9, 2014
    Inventor: Hiroaki NAGASAKA
  • Publication number: 20130233153
    Abstract: An address for reading, from a waveform memory connected by a bus, waveform data to be assigned to each of a plurality of sound generation channels for generating a musical sound, is calculated, by time division, for each sound generation channel, and the calculated address and the sound generation channels are associated and stored in an address memory. When the bus is in an empty state, an address stored in the address memory is read, and waveform data is read from the waveform memory based on the read address; the read waveform data is assigned to the corresponding sound generation channel, and generation of a musical sound is prescribed for the sound generation channel to which the waveform data is assigned.
    Type: Application
    Filed: December 21, 2012
    Publication date: September 12, 2013
    Applicant: CASIO COMPUTER CO., LTD.
    Inventor: Hiroaki NAGASAKA