Patents by Inventor Hiroaki Oshida

Hiroaki Oshida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Apparatus for dynamically migrating LPARS with pass-through I/O devices, its method, and its program
    Patent number: 8464019
    Abstract: A dynamic migration apparatus of a system logically divides hardware resources of a physical machine to configure a plurality of logical partitions using the pass-through I/O method and performs migration on the logical partitions. The apparatus makes a setting so that the same I/O device used in a migration source logical partition continues to be used in a migration destination logical partition when migration is performed.
    Type: Grant
    Filed: March 29, 2010
    Date of Patent: June 11, 2013
    Assignee: NEC Corporation
    Inventor: Hiroaki Oshida
  • Computer system and bus control device
    Patent number: 8028190
    Abstract: The bus control device includes a reset control unit which resets the input and output bus in response to receipt of reset instruction; a reset inhibition unit which inhibits a reset of the input and output bus triggered by a fault occurrence in the input and output bus; a log collection unit which collects log information of an input and output device connected to a fault occurrence section in the input and output bus triggered by the fault occurrence in the input and output bus; and an input and output interface which transfers the log information collected by the log collection unit to the processor. The reset inhibition unit cancels inhibition of the reset after the collection of the log information by the log collection unit has been completed.
    Type: Grant
    Filed: March 12, 2009
    Date of Patent: September 27, 2011
    Assignee: NEC Corporation
    Inventor: Hiroaki Oshida
  • APPARATUS FOR DYNAMICALLY MIGRATING LPARS WITH PASS-THROUGH I/O DEVICES, ITS METHOD, AND ITS PROGRAM
    Publication number: 20100250883
    Abstract: A dynamic migration apparatus of a system logically divides hardware resources of a physical machine to configure a plurality of logical partitions using the pass-through I/O method and performs migration on the logical partitions. The apparatus makes a setting so that the same I/O device used in a migration source logical partition continues to be used in a migration destination logical partition when migration is performed.
    Type: Application
    Filed: March 29, 2010
    Publication date: September 30, 2010
    Inventor: HIROAKI OSHIDA
  • Computer system, method of detecting a stall in a computer system, and signal-bearing medium embodying a program causing a computer system to perform a method of detecting a stall in a computer system
    Patent number: 7685473
    Abstract: A computer system includes a processor that executes a device driver, and a bus controller that controls an input/output bus that connects a plurality of input/output devices. The bus controller includes a stall detector that detects a stall state of the input/output bus and an error reply generator that transmits an error reply to the processor regarding a transaction transmitted to the input/output bus where the stall state is detected.
    Type: Grant
    Filed: December 8, 2005
    Date of Patent: March 23, 2010
    Assignee: NEC Corporation
    Inventor: Hiroaki Oshida
  • COMPUTER SYSTEM AND BUS CONTROL DEVICE
    Publication number: 20090235123
    Abstract: The bus control device includes a reset control unit which resets the input and output bus in response to receipt of reset instruction; a reset inhibition unit which inhibits a reset of the input and output bus triggered by a fault occurrence in the input and output bus; a log collection unit which collects log information of an input and output device connected to a fault occurrence section in the input and output bus triggered by the fault occurrence in the input and output bus; and an input and output interface which transfers the log information collected by the log collection unit to the processor. The reset inhibition unit cancels inhibition of the reset after the collection of the log information by the log collection unit has been completed.
    Type: Application
    Filed: March 12, 2009
    Publication date: September 17, 2009
    Inventor: Hiroaki OSHIDA
  • Computer system, method of detecting a stall in a computer system, and signal-bearing medium embodying a program causing a computer system to perform a method of detecting a stall in a computer system
    Publication number: 20060136789
    Abstract: A computer system includes a processor that executes a device driver, and a bus controller that controls an input/output bus that connects a plurality of input/output devices. The bus controller includes a stall detector that detects a stall state of the input/output bus and an error reply generator that transmits an error reply to the processor regarding a transaction transmitted to the input/output bus where the stall state is detected.
    Type: Application
    Filed: December 8, 2005
    Publication date: June 22, 2006
    Applicant: NEC Corporation
    Inventor: Hiroaki Oshida