Patents by Inventor Hiroaki Shikano
Hiroaki Shikano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230132818Abstract: Risk element information indicating risk elements is acquired. An asset capable of becoming a fault due to a risk element indicated in the risk element information, and a fault probability that the asset becomes the fault are specified based on static configuration information. A risk model in which the asset capable of becoming the fault and the fault probability are associated is generated in advance. In response to a designated input, an one asset to be evaluated is specified as an evaluation target asset, based on the designated input. A risk model related to the evaluation target asset is specified. A risk evaluation value being an index indicating a risk of the evaluation target asset is calculated based on the fault probability of the evaluation target asset and the static configuration information. The risk evaluation value of the evaluation target asset is associated with the asset of the risk model.Type: ApplicationFiled: October 21, 2022Publication date: May 4, 2023Inventors: Hiroaki SHIKANO, Hiroki MIYAMOTO, Hideya YOSHIUCHI
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Publication number: 20220147573Abstract: An apparatus that presents a search condition, which is an execution condition to be searched, for a correlation model that calculates an index related to an execution result of process according to the execution condition from predetermined execution conditions, includes: an importance calculation unit configured to calculate the importance of searching for each of a plurality of divided regions belonging to the search space, which is a space that the execution condition can take; an execution cost calculation unit configured to calculate an execution cost required for the process under the execution condition corresponding to the divided region; and a divided region selection unit and a screen output unit configured to select a divided region to be actually searched from the plurality of divided regions on the basis of the importance and the execution cost, and present an execution condition corresponding to the selected divided region as a search condition.Type: ApplicationFiled: September 22, 2021Publication date: May 12, 2022Inventors: Yoichi KAWACHIYA, Keiro MURO, Hiroaki SHIKANO, Satoru WATANABE
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Patent number: 11106680Abstract: Example implementations described herein are directed to systems and methods for managing a relationship between real-time analysis processes and applications, where each of the applications are configured to utilize output from one or more of the corresponding real-time analysis processes. In an example implementation, resource adjustment is applied to the real-time analysis process based on a determined priority.Type: GrantFiled: November 8, 2016Date of Patent: August 31, 2021Assignee: HITACHI, LTD.Inventors: Hiroaki Shikano, Yukinori Sakashita
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Publication number: 20190065555Abstract: Example implementations described herein are directed to systems and methods for managing a relationship between real-time analysis processes and applications, where each of the applications are configured to utilize output from one or more of the corresponding real-time analysis processes. In an example implementation, resource adjustment is applied to the real-time analysis process based on a determined priority.Type: ApplicationFiled: November 8, 2016Publication date: February 28, 2019Inventors: Hiroaki SHIKANO, Yukinori SAKASHITA
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Patent number: 10063405Abstract: A network monitoring system compares gathered network information with path information. The comparison between gathered network information and path information provides traceability of automatic and dynamic rerouting function of network and makes it possible to understand the relation between root cause and observed problems. The combined monitoring of data plane with control plane enables identification of the original failure point where behavior is changing though routing failure is propagated around. This will allow the identification of network issues that may lead to service outages and impairments as well as alerting of issues affecting customer satisfaction, and is effective to reduce MTTD (Mean Time To Detect)/MTTR (Mean Time To Repair) and increase service availability in all markets.Type: GrantFiled: December 30, 2015Date of Patent: August 28, 2018Assignee: HITACHI, LTD.Inventors: Takeshi Shibata, Miyuki Hanaoka, Hiroaki Shikano, Prasad V. Rallapalli
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Publication number: 20170195167Abstract: A network monitoring system compares gathered network information with path information. The comparison between gathered network information and path information provides traceability of automatic and dynamic rerouting function of network and makes it possible to understand the relation between root cause and observed problems. The combined monitoring of data plane with control plane enables identification of the original failure point where behavior is changing though routing failure is propagated around. This will allow the identification of network issues that may lead to service outages and impairments as well as alerting of issues affecting customer satisfaction, and is effective to reduce MTTD (Mean Time To Detect)/MTTR (Mean Time To Repair) and increase service availability in all markets.Type: ApplicationFiled: December 30, 2015Publication date: July 6, 2017Inventors: Takeshi Shibata, Miyuki Hanaoka, Hiroaki Shikano, Prasad V. Rallapalli
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Publication number: 20160092804Abstract: The present invention provides an apparatus for improving operations that improves operations management and enhances usability of an information processing system. The operations improvement apparatus improves the operations of an information processing system that includes a management-target device (146). The operations improvement apparatus includes computing apparatuses (100 and 110), and a storage apparatus (120) that is used by the computing apparatuses. The computing apparatus, in accordance with executing a prescribed computer program, acquires operational procedure information that includes a plurality of operational procedures of the information processing system, and analyzes the acquired operational procedure information (101). The computing apparatus extracts a procedure automation candidate, which is a candidate for a procedure that is capable of being automated, and outputs the extracted procedure automation candidate.Type: ApplicationFiled: February 21, 2014Publication date: March 31, 2016Applicant: HITACHI, LTD.Inventor: Hiroaki SHIKANO
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Patent number: 8990372Abstract: Operation management of equipment is made efficient by verifying a plurality of operation management manipulations on a plurality of equipment and optimizing a manipulation order before executing the manipulations. A status of equipment in a status table; a content of a manipulation in a manipulation table; a process time of the manipulation in a manipulation time prediction table; and a status required for the manipulation in the manipulation table are memorized on an operation model managing server. When a plurality of manipulations are input for a plurality of equipment by an operation manager via an operation managing server, correctness of the manipulations is verified and a manipulation order is decided on an operation verifying server based on the various types of memorized information. Also, a manipulation end time of each manipulation is notified to the operation manager via the operation managing server.Type: GrantFiled: June 4, 2012Date of Patent: March 24, 2015Assignee: Hitachi, Ltd.Inventors: Hiroaki Shikano, Junji Yamamoto, Tatsuya Saito
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Publication number: 20140364987Abstract: An operation item in which a period of manipulation by an operator makes up a dominant part and some of the procedures of another operation item in which a period of system actions makes up a dominant part are allocated in parallel to enhance the efficiency of operation. Information that discriminates whether each manipulating procedure of an operation item is dominated by a period of manipulation by an operator or by a working period of a system is stored into an operating procedure DB on a storage. Processing of operation allocation by an operation management server that supports allocation of operation items to operators utilizes the distinguishing information to multiply allocate some procedures of another operation item defined in an operation item management DB, and the already allocated procedures are presented to the operator at the operator's terminal.Type: ApplicationFiled: June 9, 2014Publication date: December 11, 2014Applicant: Hitachi, Ltd.Inventor: Hiroaki SHIKANO
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Patent number: 8812880Abstract: Provided is a multiprocessor system and a compiler used in the system for automatically extracting tasks having parallelism from an input program to be processed, performing scheduling to efficiently operate processor units by arranging the tasks according to characteristics of the processor units, and generating codes for optimizing a system frequency and a power supply voltage by estimating a processing amount of the processor units.Type: GrantFiled: January 11, 2010Date of Patent: August 19, 2014Assignee: Waseda UniversityInventors: Hironori Kasahara, Keiji Kimura, Jun Shirako, Masaki Ito, Hiroaki Shikano
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Patent number: 8635263Abstract: When the multiple sensors monitored by a sensor management unit, input sensor information into the entrance node, a sensor type identifier unit utilizes a buffer management table to buffer the data according to the sensor type. A start decision unit utilizes a processing start setting table containing accumulated start conditions for each application to execute the computation processing required by the processor units for processing the buffered sensor data according to the required application. A transmit condition decision unit decides whether or not to transmit the computation results to an external device or a CPU, and based on those decision results, transmits the computation results to the CPU or the upstream intelligent node.Type: GrantFiled: April 29, 2011Date of Patent: January 21, 2014Assignee: Hitachi, Ltd.Inventors: Hiroaki Shikano, Yuji Ogata
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Publication number: 20120314710Abstract: In nodes (141-142) disposed between terminal devices (105-110) and a processing server (101), in response to the problem in which a central portion of a network gets congested when data from a variety of apparatuses, such as sensors or control devices, is passed as is over the network, determinations are made as to whether the nodes will process packets being sent from the terminal devices to the processing server. If it is determined that the nodes will process the packets, it will be possible for the nodes to minimize load on the central portion of the network by carrying out the processing in place of the processing server.Type: ApplicationFiled: January 14, 2011Publication date: December 13, 2012Applicant: HITACHI, LTD.Inventor: Hiroaki Shikano
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Publication number: 20120317259Abstract: Operation management of equipment is made efficient by verifying a plurality of operation management manipulations on a plurality of equipment and optimizing a manipulation order before executing the manipulations. A status of equipment in a status table; a content of a manipulation in a manipulation table; a process time of the manipulation in a manipulation time prediction table; and a status required for the manipulation in the manipulation table are memorized on an operation model managing server. When a plurality of manipulations are input for a plurality of equipment by an operation manager via an operation managing server, correctness of the manipulations is verified and a manipulation order is decided on an operation verifying server based on the various types of memorized information. Also, a manipulation end time of each manipulation is notified to the operation manager via the operation managing server.Type: ApplicationFiled: June 4, 2012Publication date: December 13, 2012Applicant: HITACHI, LTD.Inventors: Hiroaki SHIKANO, Junji YAMAMOTO, Tatsuya SAITO
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Patent number: 8250548Abstract: A heterogeneous multiprocessor system including a plurality of processor elements having mutually different instruction sets and structures avoids a specific processor element from being short of resources to improve throughput. An executable task is extracted based on a preset depending relationship between a plurality of tasks, and the plurality of first processors are allocated to a general-purpose processor group based on a depending relationship among the extracted tasks. A second processor is allocated to an accelerator group, a task to be allocated is determined from the extracted tasks based on a priority value for each of tasks, and an execution cost of executing the determined task by the first processor is compared with an execution cost of executing the task by the second processor. The task is allocated to one of the general-purpose processor group and the accelerator group that is judged to be lower as a result of the cost comparison.Type: GrantFiled: January 23, 2007Date of Patent: August 21, 2012Assignee: Waseda UniversityInventors: Hironori Kasahara, Keiji Kimura, Jun Shirako, Yasutaka Wada, Masaki Ito, Hiroaki Shikano
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Patent number: 8112754Abstract: In case of a task scheduling processing that assigns plural divided execution program tasks to plural processor units, a multiprocessor system using SOI/MOS transistors employs two processes; one process is to determine an order to execute those tasks so as to reduce the program execution time and the other process is to control the system power upon task scheduling so as to control the clock signal frequency and the body-bias voltage to temporarily speed up the operation of a processor unit that processes another task that might affect the processing performance of one object task if there is dependency among those tasks.Type: GrantFiled: July 14, 2008Date of Patent: February 7, 2012Assignee: Hitachi, Ltd.Inventor: Hiroaki Shikano
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Publication number: 20110289133Abstract: When the multiple sensors monitored by a sensor management unit, input sensor information into the entrance node, a sensor type identifier unit utilizes a buffer management table to buffer the data according to the sensor type. A start decision unit utilizes a processing start setting table containing accumulated start conditions for each application to execute the computation processing required by the processor units for processing the buffered sensor data according to the required application. A transmit condition decision unit decides whether or not to transmit the computation results to an external device or a CPU, and based on those decision results, transmits the computation results to the CPU or the upstream intelligent node.Type: ApplicationFiled: April 29, 2011Publication date: November 24, 2011Applicant: HITACHI, LTD.Inventors: Hiroaki SHIKANO, Yuji OGATA
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Patent number: 8051412Abstract: Performance of a heterogeneous multiprocessor is reduced as much as possible within a short time without any awareness of parallelization matched with a configuration of the heterogeneous multiprocessor. In a heterogeneous multiprocessor system, tasks having parallelism are automatically extracted by a compiler, a portion to be efficiently processed by a dedicated processor is extracted from an input program being a processing target, and processing time is estimated. Thus, by arranging the tasks according to PU characteristics, scheduling for efficiently operating a plurality of PU's in parallel is carried out.Type: GrantFiled: March 12, 2007Date of Patent: November 1, 2011Assignee: Waseda UniversityInventors: Hironori Kasahara, Keiji Kimura, Hiroaki Shikano
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Publication number: 20110085443Abstract: As networks have spread, various services such as video streaming and IP telephone have been achieved. Along with that, complexity of networks has advanced, but there have not been a way to manage all packets distributed on networks, and thus quality guarantee and reliability securement have been problematic. Also, an increase in cost such as recovery solution upon a failure has been a big problem. Accordingly, an IP probe which detects packets distributed on communication paths in real time and visualizing a status of the network is achieved by a heterogeneous multi-core processor including a dynamic reconfigurable processor. By changing configuration function in a packet analysis depending on characteristics of the packets, low power and high performance are achieved with flexibly handling various standards and services. Also, by allocating a plurality of nodes, a status of the whole network is visualized.Type: ApplicationFiled: June 1, 2009Publication date: April 14, 2011Applicant: Hitachi. Ltd.Inventor: Hiroaki Shikano
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Patent number: 7895453Abstract: Provided is a multiprocessor system and a compiler used in the system for automatically extracting tasks having parallelism from an input program to be processed, performing scheduling to efficiently operate processor units by arranging the tasks according to characteristics of the processor units, and generating codes for optimizing a system frequency and a power supply voltage by estimating a processing amount of the processor units.Type: GrantFiled: April 12, 2006Date of Patent: February 22, 2011Assignee: Waseda UniversityInventors: Hironori Kasahara, Keiji Kimura, Jun Shirako, Masaki Ito, Hiroaki Shikano
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Publication number: 20100146310Abstract: Provided is a multiprocessor system and a compiler used in the system for automatically extracting tasks having parallelism from an input program to be processed, performing scheduling to efficiently operate processor units by arranging the tasks according to characteristics of the processor units, and generating codes for optimizing a system frequency and a power supply voltage by estimating a processing amount of the processor units.Type: ApplicationFiled: January 11, 2010Publication date: June 10, 2010Inventors: Hironori Kasahara, Keiji Kimura, Jun Shirako, Masaki Ito, Hiroaki Shikano