Patents by Inventor Hiroaki Toguchi

Hiroaki Toguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device
    Patent number: 8283945
    Abstract: FPGAs and MPLDs, which are conventional programmable semiconductor devices, have had poor cost performance and did not suitably take long signal lines into account. To solve this, a flip-flop is built into each MLUT block comprised of a plurality of MLUTs, each MLUT comprising a memory and an address-data pair. With respect to the adjacent line between adjacent MLUTs, alternated adjacent line are introduced, while in the case of interconnects between non-adjacent MLUTs, dedicated distant line and, furthermore, a torus interconnect network are provided.
    Type: Grant
    Filed: March 24, 2010
    Date of Patent: October 9, 2012
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Tetsuo Hironaka, Kazuya Tanigawa, Hiroaki Toguchi, Naoki Hirakawa, Takashi Ishiguro, Masayuki Sato
  • SEMICONDUCTOR DEVICE
    Publication number: 20120007635
    Abstract: FPGAs and MPLDs, which are conventional programmable semiconductor devices, have had poor cost performance and did not suitably take long signal lines into account. To solve this, a flip-flop is built into each MLUT block comprised of a plurality of MLUTs, each MLUT comprising a memory and an address-data pair. With respect to the adjacent line between adjacent MLUTs, alternated adjacent line are introduced, while in the case of interconnects between non-adjacent MLUTs, dedicated distant line and, furthermore, a torus interconnect network are provided.
    Type: Application
    Filed: March 24, 2010
    Publication date: January 12, 2012
    Applicant: TAIYO YUDEN CO., LTD.
    Inventors: Tetsuo Hironaka, Kazuya Tanigawa, Hiroaki Toguchi, Naoki Hirakawa, Takashi Ishiguro, Masayuki Sato