Patents by Inventor Hiroaki Ueda

Hiroaki Ueda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190207060
    Abstract: Provided is a substrate with transparent electrode, which is capable of achieving both acceleration of crystallization dining a heat treatment and suppression of crystallization under a normal temperature environment. In the substrate with transparent electrode, a transparent electrode thin-film formed of a transparent conductive oxide is formed on a film substrate. An underlayer that contains a metal oxide as a main component is formed between the film substrate and the transparent electrode thin-film. The underlayer and the transparent electrode thin-film are in contact with each other. The transparent electrode thin-film is amorphous, and the base layer is dielectric and crystalline.
    Type: Application
    Filed: March 6, 2019
    Publication date: July 4, 2019
    Inventors: Takashi Kuchiyama, Hironori Hayakawa, Hiroaki Ueda, Yuji Motohara, Kenji Yamamoto
  • Patent number: 10270010
    Abstract: Provided is a substrate with transparent electrode, which is capable of achieving both acceleration of crystallization during a heat treatment and suppression of crystallization under a normal temperature environment. In the substrate with transparent electrode, a transparent electrode thin-film formed of a transparent conductive oxide is formed on a film substrate. An underlayer that contains a metal oxide as a main component is formed between the film substrate and the transparent electrode thin-film. The underlayer and the transparent electrode thin-film are in contact with each other. The transparent electrode thin-film is amorphous, and the base layer is dielectric and crystalline.
    Type: Grant
    Filed: January 19, 2015
    Date of Patent: April 23, 2019
    Assignee: KANEKA CORPORATION
    Inventors: Takashi Kuchiyama, Hironori Hayakawa, Hiroaki Ueda, Yuji Motohara, Kenji Yamamoto
  • Patent number: 10151024
    Abstract: For use in a method for producing a transparent conductive film having an ITO transparent electrode layer, a roll-to-roll sputtering apparatus includes at least three deposition chambers adjacent to a deposition roll. While a transparent film substrate is conveyed on the deposition roll, a base conductive layer is formed by sputtering deposition in one or more deposition chambers, and a main conductive layer is formed thereon by successive sputtering deposition in two or more film deposition chambers. The applied power in the deposition chambers where the underlying conductive layer is formed is 5% to 20% of the total of the applied power in each the deposition chamber where the underlying or main conductive layer is formed. In formation of the main conductive layer, the applied power in the deposition chamber where the ITO thin film is first deposited is less than the applied power in the next deposition chamber.
    Type: Grant
    Filed: February 27, 2015
    Date of Patent: December 11, 2018
    Assignee: KANEKA CORPORATION
    Inventor: Hiroaki Ueda
  • Patent number: 10138541
    Abstract: A resin substrate with a transparent electrode having a low resistance, and a manufacturing method thereof including: a deposition step wherein a transparent electrode layer of indium tin oxide is formed on a transparent film substrate by a sputtering method, and a crystallization step wherein the transparent electrode layer is crystallized. In the deposition step, a sputtering deposition is performed using a sputtering target containing indium oxide and tin oxide, while a sputtering gas containing argon and oxygen is introduced into a chamber. It is preferable that an effective exhaust rate S, calculated from a rate Q of the sputtering gas introduced into the chamber and a pressure P in the chamber by a formula S (L/second)=1.688×Q (sccm)/P (Pa), is 1,200-5,000 (L/second). It is also preferable that a resistivity of the transparent electrode layer is less than 3×10?4 ?cm.
    Type: Grant
    Filed: August 23, 2013
    Date of Patent: November 27, 2018
    Assignee: Kaneka Corporation
    Inventors: Hironori Hayakawa, Takashi Kuchiyama, Hiroaki Ueda
  • Publication number: 20180335686
    Abstract: In an image projection device including a laser beam source and a diffractive optical element provided on an optical path of a laser beam L from the laser beam source, a transparent member having a refractive index higher than that of an area ahead of an emission surface on the optical path of the laser beam L and a diffractive optical element is formed on an emission surface of the transparent member. The laser beam L is obliquely incident on the diffractive optical element. The diffractive optical element generates a diffraction image in an area which is not overlapped with zeroth order light LR of the laser beam L and an area occupied by a conjugate image, and is arranged in a direction to irradiate a screen with diffracted light forming the diffraction image while substantially eliminating the zeroth order light and the diffracted light forming the conjugate image.
    Type: Application
    Filed: November 30, 2016
    Publication date: November 22, 2018
    Applicant: Konica Minolta, Inc.
    Inventors: Mitsuru YOKOYAMA, Hiroaki UEDA
  • Patent number: 10129998
    Abstract: An electronic device includes a first circuit board and a second circuit board arranged to have their first main surfaces facing each other, and a casing containing the first and second circuit boards. The first circuit board has the first main surface having a first electronic component with a mounting height from the first main surface toward the second circuit board greater than a distance between the first and second circuit boards. The second circuit board has an opening or a cutout as a first hollow portion facing the first electronic component. The first hollow portion receives a part of the first electronic component.
    Type: Grant
    Filed: August 21, 2017
    Date of Patent: November 13, 2018
    Assignee: OMRON Corporation
    Inventor: Hiroaki Ueda
  • Publication number: 20180098453
    Abstract: An electronic device includes a first circuit board and a second circuit board arranged to have their first main surfaces facing each other, and a casing containing the first and second circuit boards. The first circuit board has the first main surface having a first electronic component with a mounting height from the first main surface toward the second circuit board greater than a distance between the first and second circuit boards. The second circuit board has an opening or a cutout as a first hollow portion facing the first electronic component. The first hollow portion receives a part of the first electronic component.
    Type: Application
    Filed: August 21, 2017
    Publication date: April 5, 2018
    Applicant: OMRON Corporation
    Inventor: Hiroaki UEDA
  • Publication number: 20180095442
    Abstract: A power supply circuit in a PLC includes a first node that receives a DC voltage with a first level, a second node that outputs a voltage for driving a control unit, wiring connecting the first and second nodes, a first rectifier on the wiring having a forward direction from the first node to the second node, a charger for charging and discharging, a first converter that converts a discharging voltage from the charger into a DC voltage with a second level lower than the first level and outputs the voltage, and a second rectifier connected between an output of the first converter and the second node to have a forward direction from the first converter to the second node.
    Type: Application
    Filed: August 21, 2017
    Publication date: April 5, 2018
    Applicant: OMRON Corporation
    Inventors: Hiroaki UEDA, Hideki HARADA, Daisuke WAKABAYASHI
  • Patent number: 9696751
    Abstract: A substrate is provided with a transparent electrode in which the pattern is hardly visible even when the transparent electrode layer has been patterned, and a method for manufacturing thereof is provided. On at least one of the surfaces of a transparent film, a first, second, and third dielectric material layer, and a patterned transparent electrode layer are included, in this order, each preferably having a film thickness and refractive index within a specific range. The first and third dielectric material layers are silicon oxide layers containing SiOx and SiOv as main components, respectively. The second dielectric material layer is a metal oxide layer containing a metal oxide. The transparent electrode layer is a conductive metal oxide layer containing an indium-tin composite oxide as a main component. The refractive indexes of the first (n1), second (n2), and third (n3) dielectric material layers satisfy the relationship n3<n1<n2.
    Type: Grant
    Filed: January 29, 2013
    Date of Patent: July 4, 2017
    Assignee: KANEKA CORPORATION
    Inventors: Hiroaki Ueda, Kozo Kondo, Kazuhisa Danno
  • Publication number: 20170088938
    Abstract: For use in a method for producing a transparent conductive film having an ITO transparent electrode layer, a roll-to-roll sputtering apparatus includes at least three deposition chambers adjacent to a deposition roll. While a transparent film substrate is conveyed on the deposition roll, a base conductive layer is formed by sputtering deposition in one or more deposition chambers, and a main conductive layer is formed thereon by successive sputtering deposition in two or more film deposition chambers. The applied power in the deposition chambers where the underlying conductive layer is formed is 5% to 20% of the total of the applied power in each the deposition chamber where the underlying or main conductive layer is formed. In formation of the main conductive layer, the applied power in the deposition chamber where the ITO thin film is first deposited is less than the applied power in the next deposition chamber.
    Type: Application
    Filed: February 27, 2015
    Publication date: March 30, 2017
    Inventor: Hiroaki Ueda
  • Publication number: 20160351752
    Abstract: Provided is a substrate with transparent electrode, which is capable of achieving both acceleration of crystallization during a heat treatment and suppression of crystallization under a normal temperature environment. In the substrate with transparent electrode, a transparent electrode thin-film formed of a transparent conductive oxide is formed on a film substrate. An underlayer that contains a metal oxide as a main component is formed between the film substrate and the transparent electrode thin-film. The underlayer and the transparent electrode thin-film are in contact with each other. The transparent electrode thin-film is amorphous, and the base layer is dielectric and crystalline.
    Type: Application
    Filed: January 19, 2015
    Publication date: December 1, 2016
    Applicant: KANEKA CORPORATION
    Inventors: Takashi Kuchiyama, Hironori Hayakawa, Hiroaki Ueda, Yuji Motohara, Kenji Yamamoto
  • Patent number: 9198287
    Abstract: The substrate with a transparent electrode includes a first dielectric material layer mainly composed of SiOx, a second dielectric material layer mainly composed of a metal oxide, a third dielectric material layer mainly composed of SiOy, and a transparent electrode layer, in this order on a transparent film substrate. The transparent electrode layer is patterned to have an electrode layer-formed part and an electrode layer non-formed part. The transparent electrode layer is a layer mainly composed of an indium-tin composite oxide and having a thickness of 20 nm to 35 nm. The refractive index n1 of the first dielectric material layer, the refractive index n2 of the second dielectric material layer, and the refractive index n3 of the third dielectric material layer satisfy n3<n1<n2. The first dielectric material layer, the second dielectric material layer and the third dielectric material layer each have specific thicknesses.
    Type: Grant
    Filed: November 11, 2011
    Date of Patent: November 24, 2015
    Assignee: KANEKA CORPORATION
    Inventors: Hiroaki Ueda, Takahisa Fujimoto, Kozo Kondo, Kenji Yamamoto
  • Publication number: 20150225837
    Abstract: A resin substrate with a transparent electrode having a low resistance, and a manufacturing method thereof including: a deposition step wherein a transparent electrode layer of indium tin oxide is formed on a transparent film substrate by a sputtering method, and a crystallization step wherein the transparent electrode layer is crystallized. In the deposition step, a sputtering deposition is performed using a sputtering target containing indium oxide and tin oxide, while a sputtering gas containing argon and oxygen is introduced into a chamber. It is preferable that an effective exhaust rate S, calculated from a rate Q of the sputtering gas introduced into the chamber and a pressure P in the chamber by a formula S (L/second)=1.688×Q (sccm)/P (Pa), is 1,200-5,000 (L/second). It is also preferable that a resistivity of the transparent electrode layer is less than 3×10?4 ?cm.
    Type: Application
    Filed: August 23, 2013
    Publication date: August 13, 2015
    Inventors: Hironori Hayakawa, Takashi Kuchiyama, Hiroaki Ueda
  • Publication number: 20150145816
    Abstract: A substrate is provided with a transparent electrode in which the pattern is hardly visible even when the transparent electrode layer has been patterned, and a method for manufacturing thereof is provided. On at least one of the surfaces of a transparent film, a first, second, and third dielectric material layer, and a patterned transparent electrode layer are included, in this order, each preferably having a film thickness and refractive index within a specific range. The first and third dielectric material layers are silicon oxide layers containing SiOx and SiOv as main components, respectively. The second dielectric material layer is a metal oxide layer containing a metal oxide. The transparent electrode layer is a conductive metal oxide layer containing an indium-tin composite oxide as a main component. The refractive indexes of the first (n1), second (n2), and third (n3) dielectric material layers satisfy the relationship n3<n1<n2.
    Type: Application
    Filed: January 29, 2013
    Publication date: May 28, 2015
    Inventors: Hiroaki Ueda, Kozo Kondo, Kazuhisa Danno
  • Publication number: 20140370275
    Abstract: The present invention relates to a substrate with a transparent electrode, which has a transparent electrode layer on at least one surface of a transparent film base material. The transparent film base material has a transparent dielectric material layer containing an oxide as a main component on a surface at the transparent electrode layer side. In one embodiment of the present invention, the transparent electrode layer is a crystalline transparent electrode layer that has a crystallinity degree of 80% or more. In this embodiment, the crystalline transparent electrode layer has a resistivity of 3.5×10?4 ?·cm or less, a thickness of 15 nm to 40 nm, an indium oxide content of 87.5% to 95.5%, and a carrier density of 4×1020/cm3 to 9×1020/cm3, and the substrate with the transparent electrode preferably has a heat shrinkage start temperature of 75° C. to 120° C. as measured by thermomechanical analysis.
    Type: Application
    Filed: January 18, 2013
    Publication date: December 18, 2014
    Applicant: KANEKA CORPORATION
    Inventors: Takashi Kuchiyama, Hironori Hayakawa, Hiroaki Ueda, Takahisa Fujimoto, Kenji Yamamoto
  • Publication number: 20140232951
    Abstract: The substrate with a transparent electrode includes a first dielectric material layer mainly composed of SiOx, a second dielectric material layer mainly composed of a metal oxide, a third dielectric material layer mainly composed of SiOy, and a transparent electrode layer, in this order on a transparent film substrate. The transparent electrode layer is patterned to have an electrode layer-formed part and an electrode layer non-formed part. The transparent electrode layer is a layer mainly composed of an indium-tin composite oxide and having a thickness of 20 nm to 35 nm. The refractive index n1 of the first dielectric material layer, the refractive index n2 of the second dielectric material layer, and the refractive index n3 of the third dielectric material layer satisfy n3<n1<n2. The first dielectric material layer, the second dielectric material layer and the third dielectric material layer each have specific thicknesses.
    Type: Application
    Filed: November 11, 2011
    Publication date: August 21, 2014
    Applicant: KANEKA CORPORATION
    Inventors: Hiroaki Ueda, Takahisa Fujimoto, Kozo Kondo, Kenji Yamamoto
  • Patent number: 8160429
    Abstract: A video image data compression archiver is composed of an encoder and an encoder controller. The encoder compresses non-compressed video image data to generate compressed video image data. The encoder controller is connected to said encoder to control a frame size, a frame rate, and an average bit rate of said compressed video image data in response to at least one parameter selected from a group consisting of a number of frames of said non-compressed video image data, a recording time of said non-compressed video image data, and a free area of a recording medium for recording said compressed video image data.
    Type: Grant
    Filed: July 7, 2003
    Date of Patent: April 17, 2012
    Assignee: NEC Personal Computers, Ltd.
    Inventors: Hiroaki Ueda, Ryuji Satou
  • Publication number: 20120069721
    Abstract: A recorder has a recording medium for information recording, a light source, an optical system, a slider, and an optical waveguide. To the optical system, light from the light source enters, and the slider moves relative to the recording medium while not in contact therewith. The optical waveguide is arranged at position facing the recording medium in the slider so that light entering from the optical system is irradiated on the recording medium. Where the mode field diameter of the optical waveguide on the light output side is d and the mode field diameter thereof on the light input side is D, the mode field diameter is converted by smoothly changing the diameter of the optical waveguide to satisfy D>d.
    Type: Application
    Filed: November 23, 2011
    Publication date: March 22, 2012
    Inventors: Naoki Nishida, Hiroaki Ueda, Manami Kuiseko, Koujirou Sekine, Kenji Konno, Masahiro Okitsu, Hiroshi Hatano
  • Patent number: 8134893
    Abstract: Provided is an optical recording head in which a light beam from a light source is collected by an optical element and reflected on a reflecting surface to be formed into a spot light. Since a support portion for supporting the light source of the optical element at a predetermined position and the reflection surface for reflecting the light beam are formed integrally with each other, it is not required to perform the positioning thereof, and light can be collected to a very small spot with high efficiency, and an optical recording head and an optical recording apparatus having low heights can be provided.
    Type: Grant
    Filed: April 2, 2007
    Date of Patent: March 13, 2012
    Assignee: Konica Minolta Opto, Inc.
    Inventors: Kenji Konno, Hiroaki Ueda, Manami Kuiseko, Naoki Nishida, Koujirou Sekine, Masahiro Okitsu, Hiroshi Hatano
  • Patent number: D857637
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: August 27, 2019
    Assignee: OMRON Corporation
    Inventors: Hiroaki Ueda, Sadahito Otsu, Yoshimi Azuma, Heita Nada