Abstract: A map information assessment device has a processor configured to match a plurality of first zones representing a first road in a first map, with second zones representing a second road in a second map, the matching being made by using locations on the second road that are closest to the starting points of the first zones as the starting points, and using zones having the same lengths as the first zones, as the second zones corresponding to the first zones, to calculate zone adjacent distances between the end points of the second zones and the starting points of other second zones adjacent to those second zones, and to determine that positional information for the first road in a first zone is different from positional information for the second road in a second zone corresponding to that first zone, when the zone adjacent distance is greater than a threshold.

Abstract: A reception circuit includes a control signal generation circuit that generates a first enable signal based on a strobe signal and a second enable signal based on a core clock signal and a pointer control signal. A pattern data generation circuit generates determination pattern data from the first enable signal. An asynchronous transfer circuit latches the determination pattern data based on the first enable signal and the strobe signal and outputs determination data corresponding to the latched determination pattern data based on the second enable signal and the core clock signal. A determination circuit determines a timing for generating the pointer control signal based on the determination data. A set value calculation circuit calculates a transfer set value based on the determination result of the determination circuit. The control signal generation circuit updates the pointer control signal based on the transfer set value.

Abstract: A reception circuit includes a control signal generation circuit that generates a first enable signal based on a strobe signal and a second enable signal based on a core clock signal and a pointer control signal. A pattern data generation circuit generates determination pattern data from the first enable signal. An asynchronous transfer circuit latches the determination pattern data based on the first enable signal and the strobe signal and outputs determination data corresponding to the latched determination pattern data based on the second enable signal and the core clock signal. A determination circuit determines a timing for generating the pointer control signal based on the determination data. A set value calculation circuit calculates a transfer set value based on the determination result of the determination circuit. The control signal generation circuit updates the pointer control signal based on the transfer set value.