Patents by Inventor Hiroaki Yamada

Hiroaki Yamada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8114755
    Abstract: A method of manufacturing a semiconductor device includes removing a part of a semiconductor substrate to form a protruding portion and a recess portion in a surface area of the semiconductor substrate, forming a first epitaxial semiconductor layer in the recess portion, forming a second epitaxial semiconductor layer on the protruding portion and the first epitaxial semiconductor layer, removing a first part of the second epitaxial semiconductor layer with a second part of the second epitaxial semiconductor layer left to expose a part of the first epitaxial semiconductor layer, and etching the first epitaxial semiconductor layer from the exposed part of the first epitaxial semiconductor layer to form a cavity under the second part of the second epitaxial semiconductor layer.
    Type: Grant
    Filed: June 25, 2008
    Date of Patent: February 14, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ichiro Mizushima, Yoshio Ozawa, Takashi Nakao, Akihito Yamamoto, Takashi Suzuki, Masahiro Kiyotoshi, Minako Inukai, Kaori Umezawa, Hiroaki Yamada
  • Publication number: 20120031441
    Abstract: A substrate cleaning apparatus, comprises a process tank that holds a mixture containing a hydrogen peroxide solution and sulfuric acid and is used for cleaning a substrate immersed in said mixture; circulation piping that extends between a primary side of said process tank on which said mixture is injected into said process tank and a secondary side of said process tank on which said mixture is discharged from said process tank and has a pump for causing circulation of said mixture; a heater disposed in said circulation piping configured to heat said mixture to a predetermined temperature; a chemical injection pipe configured to inject a hydrogen peroxide solution into said circulation piping at a position between the primary side of said process tank and a secondary side, which is a downstream side, of said heater; and a filter disposed in said circulation piping configured to remove particles in said mixture.
    Type: Application
    Filed: October 20, 2011
    Publication date: February 9, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Tomita, Hiroaki Yamada, Kunihiro Miyazaki, Hajime Onoda
  • Patent number: 8066020
    Abstract: A substrate cleaning apparatus, comprises a process tank that holds a mixture containing a hydrogen peroxide solution and sulfuric acid and is used for cleaning a substrate immersed in said mixture; circulation piping that extends between a primary side of said process tank on which said mixture is injected into said process tank and a secondary side of said process tank on which said mixture is discharged from said process tank and has a pump for causing circulation of said mixture; a heater disposed in said circulation piping configured to heat said mixture to a predetermined temperature; a chemical injection pipe configured to inject a hydrogen peroxide solution into said circulation piping at a position between the primary side of said process tank and a secondary side, which is a downstream side, of said heater; and a filter disposed in said circulation piping configured to remove particles in said mixture.
    Type: Grant
    Filed: October 27, 2006
    Date of Patent: November 29, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Tomita, Hiroaki Yamada, Kunihiro Miyazaki, Hajime Onoda
  • Patent number: 8053953
    Abstract: An electronic component, which is surface-mounted on a wiring board by soldering, and in which the occurrence of cracks in the solder after surface-mounting is suppressed, may include: a member constituting at least part of a container and made of ceramic; and an external terminal provided on the outer surface of the member and used in surface-mounting the electronic component on the wiring board by solder. The film thickness of a layer constituting the external terminal is designed so that when the thermal expansion coefficient of the ceramic constituting the member is ?1, combined expansion coefficient ?k of the member and the external terminal satisfies a relation of 1.029??k/?1?1.216. The external terminal preferably comprises a nickel layer as an electrode body.
    Type: Grant
    Filed: November 8, 2007
    Date of Patent: November 8, 2011
    Assignee: Nihon Dempa Kogyo Co., Ltd.
    Inventor: Hiroaki Yamada
  • Publication number: 20110180318
    Abstract: There is provided an electric junction box (1) which can reduce the usage of the heat-resistant resin for a connector fitting portion. The electrical junction box (1) includes a case (4) including a box-like body (3) and a box-like body (2) to be assembled together, a substrate (5) received in the case (4), a connector fitting portion (9) arranged to engage with a connector and having a terminal (6) soldered to the substrate (5) with lead-free solder, a holding portion (19) holding the terminal (6), and a tubular outer wall (8) surrounding the terminal (6). The holding portion (19) and the outer wall (8) are formed as separate parts. The outer wall (8) is divided into two segments formed integrally with the box-like bodies (3, 2), respectively. The holding portion (9) is made of heat-resistant resin while the outer wall (8) is made of non-heat-resistant resin.
    Type: Application
    Filed: January 21, 2011
    Publication date: July 28, 2011
    Applicant: Yazaki Corporation
    Inventors: Hiroaki Yamada, Hiroki Shiraiwa, Katsuyoshi Kobayashi
  • Publication number: 20110088731
    Abstract: A method has been disclosed which cleans a semiconductor substrate using a cleaning liquid produced by mixing bubbles of a gas into an acid solution in which the gas has been dissolved to the saturated concentration and which brings the zeta potentials of the semiconductor substrate and adsorbed particles into the negative region by the introduction of an interfacial active agent. Alternatively, a semiconductor substrate is cleaned using a cleaning liquid produced by mixing bubbles of a gas into an alkaline solution in which the gas has been dissolved to the saturated concentration and whose pH is 9 or more.
    Type: Application
    Filed: December 27, 2010
    Publication date: April 21, 2011
    Applicant: Kabushiki kaisha Toshiba
    Inventors: Hiroshi TOMITA, Hiroyasu Iimori, Hiroaki Yamada, Minako Inukai
  • Publication number: 20110052189
    Abstract: An optical device for rearranging wavelength channels in an optical network is disclosed. The optical device has a wavelength selective coupler having one input port and a plurality of output ports coupled to a plurality of input ports of an optical grating demultiplexor such as an arrayed waveguide grating. The wavelength channels in each of the input ports are dispersed by the demultiplexor and are directed to a plurality of output ports of the optical grating demultiplexor. As a result, at least one wavelength channel at each of the input ports of the optical grating demultiplexor is coupled into a common output port. The optical device is useful in passive optical networks wherein a same demultiplexor is used for simultaneous multiplexing and demultiplexing of wavelength channels.
    Type: Application
    Filed: July 30, 2010
    Publication date: March 3, 2011
    Inventors: Hiroaki Yamada, Barthelemy Fondeur, Jinxi Shen, Zi-Wen Dong, Domenico Di Mola, Jyoti K. Bhardwaj, Yimin Hua
  • Patent number: 7896970
    Abstract: A semiconductor substrate cleaning liquid composition is provided that includes one or more types selected from the group consisting of a compound having at least two sulfonic acid groups per molecule, phytic acid, and a condensed phosphoric acid compound; an inorganic acid; and water. There is also provided a process for cleaning a semiconductor substrate that includes a first step of cleaning the semiconductor substrate using the semiconductor substrate cleaning liquid composition and, subsequent to the first step, a second step of cleaning the semiconductor substrate with pure water, ozone water formed by dissolving ozone gas in pure water, or aqueous hydrogen peroxide.
    Type: Grant
    Filed: August 16, 2007
    Date of Patent: March 1, 2011
    Assignees: Kabushiki Kaisha Toshiba, Kanto Kagaku Labushiki Kaisha
    Inventors: Hiroshi Tomita, Yuji Yamada, Hiroaki Yamada, Norio Ishikawa, Yumiko Abe
  • Patent number: 7888398
    Abstract: This present invention can provide a novel pigment useful in color image displays to form blue pixels capable of providing high-level brightness and saturation, especially a finely-divided pigment which has bright hue and is excellent in pigment physical properties such as light fastness, solvent resistance and heat resistance, and a process for producing the same, a pigment dispersion making use of the pigment, and an ink for a color filters. The novel pigment is produced by forming into a pigment a subphthalocyanine represented by the following formula (1): wherein X is a halogen atom, presents diffraction peaks at diffraction angles (2?) 7.0°, 12.3°, 20.4° and 23.4° in x-ray diffraction, and has an average particle size of 120 to 20 nm.
    Type: Grant
    Filed: July 26, 2005
    Date of Patent: February 15, 2011
    Assignee: Dainichiseika Color & Chemicals Mfg. Co., Ltd.
    Inventors: Naoki Hirata, Hisao Okamoto, Yoshiyuki Zama, Michiei Nakamura, Tetsuya Yanagimoto, Hiroaki Yamada, Masahiro Tsuchiya
  • Publication number: 20110026407
    Abstract: This invention enables an abnormality analysis to be easily and reliably performed in the FA system of the EtherCAT (registered trademark). A controller has a protocol monitor function of operating in a monitor system program, and constantly monitors data communicated with a remote device. The controller has an abnormality diagnosis function of detecting abnormality, and thus holds the data monitored immediately before when abnormality is detected. As the protocol monitor function is incorporated, a protocol monitor does not need to be newly plugged into the network as an external device after the occurrence of abnormality, and the data that becomes the cause can be held from the abnormality that occurred first by monitoring from the beginning of the operation of the system and can be used for analysis.
    Type: Application
    Filed: February 25, 2010
    Publication date: February 3, 2011
    Inventors: Hiroaki YAMADA, Masahiro NISHI
  • Publication number: 20110011516
    Abstract: A shrinkage suppression layer used in the production of a ceramic substrate according to a non-shrinkage process provides favorable removal performance while sufficiently ensuring the restraining performance of the shrinkage suppression layer. Resin beads, which disappear at a temperature lower than the sintering temperature of a low-temperature sintering ceramic material of a base material layer to form open bores in a shrinkage suppression layer, are added to the shrinkage suppression layer and dispersed uniformly at least in a principal surface direction. The shrinkage suppression layer provides sufficient restraining performance to the base material layer in the step of firing, and after the firing, forms open bores, thereby improving the removal performance of the shrinkage suppression layer.
    Type: Application
    Filed: September 23, 2010
    Publication date: January 20, 2011
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Kazuo KISHIDA, Hiroaki YAMADA
  • Patent number: 7717757
    Abstract: Lock portions 4 are provided more inside than outermost wall surfaces 5a, 6a of a cassette relay block 1, and the cassette relay block 1 is inserted into space surrounded by peripheral walls 16 to 19 on an attaching side, and fixed by the lock portions 4 and locked portions 10 located on the peripheral wall side. The peripheral walls 16 to 19 on the attaching side are formed as a cassette frame 2. The cassette frame is used in common for the cassette relay block 1 or other cassette electric parts mounting blocks. The plural cassette frames are coupled to each other by lock members 54, and coupled to a connection box body by locked members thereby to constitute an electric connection box.
    Type: Grant
    Filed: July 23, 2004
    Date of Patent: May 18, 2010
    Assignee: Yazaki Corporation
    Inventors: Hiroaki Yamada, Nobutaka Kaneko, Hiroaki Kamo, Katsuji Suzuura
  • Patent number: 7700381
    Abstract: A semiconductor wafer has a bevel contour formed along the periphery thereof, products formed on the wafer, and an ID mark formed on the bevel contour. The ID mark shows at least the properties, manufacturing conditions, and test results of the products.
    Type: Grant
    Filed: February 9, 2006
    Date of Patent: April 20, 2010
    Assignee: Kabushikia Kaisha Toshiba
    Inventors: Tsunetoshi Arikado, Masao Iwase, Soichi Nadahara, Yuso Udo, Yukihiro Ushiku, Shinichi Nitta, Moriya Miyashita, Junji Sugamoto, Hiroaki Yamada, Hajime Nagano, Katsujiro Tanzawa, Hiroshi Matsushita, Norihiko Tsuchiya, Katsuya Okumura
  • Publication number: 20100060108
    Abstract: An electronic component, which is surface-mounted on a wiring board by soldering, and in which the occurrence of cracks in the solder after surface-mounting is suppressed, may include: a member constituting at least part of a container and made of ceramic; and an external terminal provided on the outer surface of the member and used in surface-mounting the electronic component on the wiring board by solder. The film thickness of a layer constituting the external terminal is designed so that when the thermal expansion coefficient of the ceramic constituting the member is ?1, combined expansion coefficient ?k of the member and the external terminal satisfies a relation of 1.029??k/?1?1.216. The external terminal preferably comprises a nickel layer as an electrode body.
    Type: Application
    Filed: November 8, 2007
    Publication date: March 11, 2010
    Applicant: NIHON DEMPA KOGYO CO., LTD.
    Inventor: Hiroaki Yamada
  • Publication number: 20100049984
    Abstract: An information processing apparatus according to the present application includes a first application allowed to access the IC chip, including an IC chip in which predetermined data is recorded, an IC chip reading unit that reads the data recorded in the IC chip, and a signature data generation unit that generates signature data by performing encryption processing on the recorded data read by the IC chip reading unit and a second application not allowed to access the IC chip, including a server access unit that requests acquisition of content from an information providing server by receiving the signature data and the recorded data from the first application and transmitting the signature data and the recorded data to the information providing server that provides predetermined content.
    Type: Application
    Filed: August 18, 2009
    Publication date: February 25, 2010
    Applicant: FELICA NETWORKS, INC.
    Inventors: Tomohiro Masushio, Naoto Tobita, Hiroaki Yamada
  • Patent number: 7609714
    Abstract: A duplexed network system is formed with a plurality of programmable controllers and two different networks. Each of the programmable controllers includes a CPU unit, a primary communication unit connected to one of these networks (the first network) and a secondary communication unit connected to the other of the networks (the second network). The primary communication unit serves to compile participation status of nodes connected to the first network. The CPU unit gives priority to the primary communication unit when a request to transmit a communication command is issued to both the primary and secondary communication units.
    Type: Grant
    Filed: September 17, 2004
    Date of Patent: October 27, 2009
    Assignee: OMRON Corporation
    Inventors: Hiroaki Yamada, Hideo Okeda, Kenichiro Tomita, Makoto Ishikawa
  • Publication number: 20090011570
    Abstract: A method of manufacturing a semiconductor device includes removing a part of a semiconductor substrate to form a protruding portion and a recess portion in a surface area of the semiconductor substrate, forming a first epitaxial semiconductor layer in the recess portion, forming a second epitaxial semiconductor layer on the protruding portion and the first epitaxial semiconductor layer, removing a first part of the second epitaxial semiconductor layer with a second part of the second epitaxial semiconductor layer left to expose a part of the first epitaxial semiconductor layer, and etching the first epitaxial semiconductor layer from the exposed part of the first epitaxial semiconductor layer to form a cavity under the second part of the second epitaxial semiconductor layer.
    Type: Application
    Filed: June 25, 2008
    Publication date: January 8, 2009
    Inventors: Ichiro Mizushima, Yoshio Ozawa, Takashi Nakao, Akihito Yamamoto, Takashi Suzuki, Masahiro Kiyotoshi, Minako Inukai, Kaori Umezawa, Hiroaki Yamada
  • Publication number: 20080308132
    Abstract: A method has been disclosed which cleans a semiconductor substrate using a cleaning liquid produced by mixing bubbles of a gas into an acid solution in which the gas has been dissolved to the saturated concentration and which brings the zeta potentials of the semiconductor substrate and adsorbed particles into the negative region by the introduction of an interfacial active agent. Alternatively, a semiconductor substrate is cleaned using a cleaning liquid produced by mixing bubbles of a gas into an alkaline solution in which the gas has been dissolved to the saturated concentration and whose pH is 9 or more.
    Type: Application
    Filed: May 29, 2008
    Publication date: December 18, 2008
    Inventors: Hiroshi Tomita, Hiroyasu Iimori, Hiroaki Yamada, Minako Inukai
  • Publication number: 20080284560
    Abstract: There is provided an information processing system that includes an information processing terminal equipped with an IC chip capable of non-contact communication with a reader/writer, a data provider device that stores a first data record for creating service data, and a control information processing device that creates the service data and transmits the service data to the information processing terminal. The information processing terminal includes a terminal communication portion that acquires the first data record from the data provider device and transmits the first data record to the control information processing device. The control information processing device includes a control communication portion that receives the first data record, a control storage portion that stores a second data record for creating the service data, and a data creation portion that creates the service data based on the first data record and the second data record.
    Type: Application
    Filed: April 10, 2008
    Publication date: November 20, 2008
    Inventors: Naoto Tobita, Shigeki Wakasa, Makoto Daicho, Hiroaki Yamada
  • Publication number: 20080263127
    Abstract: There is provided a communication apparatus including an identification data generation portion to generate identification data, an identification data storage portion to store the identification data generated by the identification data generation portion, a basic data reception portion to receive basic data from an information processing server through a given communication path, the basic data containing prescribed first data specifying service data generated in the distribution server and containing data to be used in an IC chip capable of con tactless communication with a reader/writer, and prescribed identification data, and a data acquisition portion to acquire the service data generated based on the basic data in the distribution server from the distribution server if the prescribed identification, data matches with the identification data stored in the identification data storage portion.
    Type: Application
    Filed: April 9, 2008
    Publication date: October 23, 2008
    Inventors: Naoto TOBITA, Shigeki Wakasa, Hiroaki Yamada