Patents by Inventor Hirobumi MINEGISHI

Hirobumi MINEGISHI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SEMICONDUCTOR MODULE
    Publication number: 20180138828
    Abstract: Reliability of a semiconductor device is improved. A third semiconductor chip on which a control circuit is formed, and a first semiconductor chip of a plurality of IGBT chips are electrically connected via a high-side relay board. That is, the first semiconductor chip and the third semiconductor chip are electrically connected via a first wire, a high-side relay board and a second wire. Similarly, the third semiconductor chip on which the control circuit is formed and a second semiconductor chip of a plurality of IGBT chips are electrically connected via a low-side relay board. That is, the second semiconductor chip and the third semiconductor chip are electrically connected via the first wire, the low-side relay board and the second wire.
    Type: Application
    Filed: January 11, 2018
    Publication date: May 17, 2018
    Inventors: Kuniharu MUTO, Koji BANDO, Takamitsu KANAZAWA, Ryo KANDA, Akihiro TAMURA, Hirobumi MINEGISHI
  • Semiconductor module
    Patent number: 9906165
    Abstract: Reliability of a semiconductor device is improved. A third semiconductor chip on which a control circuit is formed, and a first semiconductor chip of a plurality of IGBT chips are electrically connected via a high-side relay board. That is, the first semiconductor chip and the third semiconductor chip are electrically connected via a first wire, a high-side relay board and a second wire. Similarly, the third semiconductor chip on which the control circuit is formed and a second semiconductor chip of a plurality of IGBT chips are electrically connected via a low-side relay board. That is, the second semiconductor chip and the third semiconductor chip are electrically connected via the first wire, the low-side relay board and the second wire.
    Type: Grant
    Filed: June 28, 2016
    Date of Patent: February 27, 2018
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Kuniharu Muto, Koji Bando, Takamitsu Kanazawa, Ryo Kanda, Akihiro Tamura, Hirobumi Minegishi
  • SEMICONDUCTOR DEVICE
    Publication number: 20170033710
    Abstract: Reliability of a semiconductor device is improved. A third semiconductor chip on which a control circuit is formed, and a first semiconductor chip of a plurality of IGBT chips are electrically connected via a high-side relay board. That is, the first semiconductor chip and the third semiconductor chip are electrically connected via a first wire, a high-side relay board and a second wire. Similarly, the third semiconductor chip on which the control circuit is formed and a second semiconductor chip of a plurality of IGBT chips are electrically connected via a low-side relay board. That is, the second semiconductor chip and the third semiconductor chip are electrically connected via the first wire, the low-side relay board and the second wire.
    Type: Application
    Filed: June 28, 2016
    Publication date: February 2, 2017
    Inventors: Kuniharu MUTO, Koji BANDO, Takamitsu KANAZAWA, Ryo KANDA, Akihiro TAMURA, Hirobumi MINEGISHI