Abstract: A thermoelectric module (1) utilizing the Peltier effect, exhibiting an element-occupied area ratio of 40% or below, the element-occupied area ratio defined as the ratio of the sum of cross-sectional areas, perpendicular to the direction of electric current passage, of thermoelectric elements (5a,5b) to the area of insulating substrate (2a) being in contact with an object to be cooled via a metalized layer (4a), wherein metalized layers (4a,4b) are provided with slits. In this construction, there can be prevented breakage of thermoelectric device by thermal stress occurring at assembly, or thermal stress occurring at pre-tinning conducted in advance for attaching an object to be cooled or at attaching package, etc.

Abstract: A method for efficiently fabricating semiconductor wafers of good planarization without utilizing chemical solutions of high etching rate is disclosed. The method slices a single-crystal ingot into slices of wafers. The edge of each wafer is chamfered. A lapping or grinding step is carried out to planarize the chamfered wafer. Both side surfaces of the wafer are then polished. Next, the wafer surface is mirror polished. Finally, the wafer is cleaned.

Abstract: A method for efficiently fabricating semiconductor wafers of good planarization without utilizing chemical solutions of high etching rate is disclosed. The method slices a single-crystal ingot into slices of wafers. The edge of each wafer is chamfered. A lapping step is carried out to planarize the chamfered wafer. Both side surfaces of the wafer are then polished. Next, the wafer surface is mirror polished. Finally, the wafer is cleaned.

Abstract: The present invention provides a process for fabricating a semiconductor wafer, including surface-grinding both sides of the sliced wafer, and cleaning the surface-ground wafer with an alkaline solution to remove the sharp protruded part. The frictional resistance between the surface-ground wafer and a polishing cloth can be reduced, thus extending a life of a template and the polishing cloth.

Abstract: A method for polishing a semiconductor wafer is provided. A semiconductor wafer is detached from a polishing pad on a side of an upper polishing plate and is kept to be supported by a lower polishing plate. A contact area between the a wafer and the upper polishing plate is set to be less than a contact area between the wafer and the lower polishing plate. As a result, the wafer is definitely detached from the polishing pad on the side of the upper polishing plate and is to be kept supported by the lower polishing plate when the upper polishing plate is lifted.

Abstract: method of manufacturing semiconductor wafers, which can prevent the pendent surface phenomenon during the mirror polishing of the wafers and can enhance the flatness of the mirror polished surfaces. The method of manufacturing semiconductor wafers according to this invention includes slicing ingots into wafers, chamfering the peripheral edge portions of the wafers, lapping the sliced surfaces of the wafers, grinding the lapped surfaces of the wafers to form a gradual concave shape, mirror polishing the ground surfaces of the wafers, and finally cleaning the mirror polished wafers.

Abstract: The present invention provides a process for making a semiconductor wafer, including slicing an ingot to obtain wafers; surface-grinding both sides of each of the wafers; etching the wafers with an alkaline solution; chamfering the peripheral portion of each of the wafers; both-side polishing the wafers for mirror processing ; cleaning both sides of each of the wafers to remove the particles attached to the sides; and drying and cleaning the wafers. By employing the present process, the time for polishing the wafer can be shortened, and the semiconductor wafer can be made effectively.

Abstract: A method of making semiconductor wafers can prevent processing strain on peripheral portions of wafers caused by non-wax polishing using a template. This involves mirror chamfering or etching the peripheral portions of the wafers after the non-wax polishing step.