Patents by Inventor Hirofumi Hamamura

Hirofumi Hamamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7516059
    Abstract: A logical simulation device executes simulation, based on cycle, using level sort and compile methods. In order to realize the high speed of the entire system in a practically usable scale, the system comprises a lot of processors, each capable of performing an evaluation process of executing simulation using a logical block corresponding to one or more gates as an evaluation unit, and a communication process with the other processors. A plurality of processors constitute a processor group, and a plurality of processor groups are connected to each other to form a tree-shaped hierarchy.
    Type: Grant
    Filed: June 27, 2005
    Date of Patent: April 7, 2009
    Assignee: Fujitsu Limited
    Inventors: Hiroaki Komatsu, Hirofumi Hamamura
  • Publication number: 20050240388
    Abstract: A logical simulation device executes simulation, based on cycle, using level sort and compile methods. In order to realize the high speed of the entire system in a practically usable scale, the system comprises a lot of processors, each capable of performing an evaluation process of executing simulation using a logical block corresponding to one or more gates as an evaluation unit, and a communication process with the other processors. A plurality of processors constitute a processor group, and a plurality of processor groups are connected to each other to form a tree-shaped hierarchy.
    Type: Application
    Filed: June 27, 2005
    Publication date: October 27, 2005
    Applicant: FUJITSU LIMITED
    Inventors: Hiroaki Komatsu, Hirofumi Hamamura
  • Patent number: 6775710
    Abstract: A path determination method includes the steps of (a) determining a path in a first region which has a utilization efficiency less than a predetermined value probability-wise, (b) determining a path in a second region which is different from the first region when the utilization efficiency of the first region exceeds a second predetermined value, where the second region has a utilization efficiency exceeding the first predetermined value probability-wise, (c) dividing an entire region which is to be subjected to a path determination into partial regions of predetermined sizes and using the partial regions as a minimum unit of path search, (d) assigning to each of the partial regions a state quantity which is described by a path accommodating capacity within each of the partial regions, and (e) searching a path between two points by controlling a search speed depending on a change in the state quantity between adjacent partial regions.
    Type: Grant
    Filed: October 4, 2000
    Date of Patent: August 10, 2004
    Assignee: Fujitsu Limited
    Inventor: Hirofumi Hamamura
  • Patent number: 5644500
    Abstract: This invention is directed to a method and apparatus to find out an optimum solution in automatic routing or automatic placement with certainty and at a high-speed to improve a routing rate, and to realize automatic routing in a high-density. To these end, a routing approach is selected in a conversational mode while routing efficiency is consulted to compose routing processing procedure so as to generate a routing program. Besides, component placement processing procedures designated according to placement control information are combined to generate the placement program. A straight line between component pins adjacent to each other is defined as a chord, a wave for maze method routing is generated from a start point toward an end point of a routing path and propagated between the chords adjacent to each other.
    Type: Grant
    Filed: July 1, 1996
    Date of Patent: July 1, 1997
    Assignee: Fujitsu Limited
    Inventors: Hiroshi Miura, Masato Ariyama, Kazuyuki Iida, Kazufumi Iwahara, Mitsunobu Okano, Hiroyuki Orihara, Akira Katsumata, Toshiyasu Sakata, Masaharu Nishimura, Hirofumi Hamamura, Naoki Murakami, Mitsuru Yasuda, Yasuhiro Yamashita, Ryouji Yamada, Atsushi Yamane