Patents by Inventor Hirofumi Iwanaga

Hirofumi Iwanaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10795224
    Abstract: A curved display apparatus includes a display panel curved along a first direction, and an FPC board used for driving the display panel. The FPC board is connected to a side of a curved side of the display panel. The FPC board is provided with the slits for reducing the stress applied to the FPC board.
    Type: Grant
    Filed: February 21, 2019
    Date of Patent: October 6, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventor: Hirofumi Iwanaga
  • Patent number: 10451933
    Abstract: Regions including a respective plurality of connectors of a relay FPC are disposed while respectively facing a plurality of planes of a lower frame formed in accordance with a curvature of a curved display panel, and a connection FPC mounted in an end portion of the display panel is connected to the connector of the relay FPC.
    Type: Grant
    Filed: September 26, 2017
    Date of Patent: October 22, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kenji Arita, Takashi Miyayama, Hirofumi Iwanaga
  • Publication number: 20190278126
    Abstract: A curved display apparatus includes a display panel curved along a first direction, and an FPC board used for driving the display panel. The FPC board is connected to a side of a curved side of the display panel. The FPC board is provided with the slits for reducing the stress applied to the FPC board.
    Type: Application
    Filed: February 21, 2019
    Publication date: September 12, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventor: Hirofumi IWANAGA
  • Publication number: 20180113349
    Abstract: Regions including a respective plurality of connectors of a relay FPC are disposed while respectively facing a plurality of planes of a lower frame formed in accordance with a curvature of a curved display panel, and a connection FPC mounted in an end portion of the display panel is connected to the connector of the relay FPC.
    Type: Application
    Filed: September 26, 2017
    Publication date: April 26, 2018
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kenji ARITA, Takashi MIYAYAMA, Hirofumi IWANAGA
  • Patent number: 9690151
    Abstract: A liquid crystal panel includes an array substrate and a counter substrate facing the array substrate that are bonded to each other through a seal located along a peripheral edge. Vcom wiring and GND wiring are provided in a peripheral region of the array substrate. The Vcom wiring is provided between a display region and the GND wiring. The GND wiring extends beyond an edge of the seal.
    Type: Grant
    Filed: February 11, 2015
    Date of Patent: June 27, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takafumi Hashiguchi, Takeshi Shimamura, Naruhito Hoka, Hirofumi Iwanaga
  • Publication number: 20150241746
    Abstract: A liquid crystal panel includes an array substrate and a counter substrate facing the array substrate that are bonded to each other through a seal located along a peripheral edge. Vcom wiring and GND wiring are provided in a peripheral region of the array substrate. The Vcom wiring is provided between a display region and the GND wiring. The GND wiring extends beyond an edge of the seal.
    Type: Application
    Filed: February 11, 2015
    Publication date: August 27, 2015
    Applicant: Mitsubishi Electric Corporation
    Inventors: Takafumi HASHIGUCHI, Takeshi SHIMAMURA, Naruhito HOKA, Hirofumi IWANAGA
  • Patent number: 7880853
    Abstract: The present invention provides a display device which has a narrow screen border, and excellent display equality. The display device according to the present invention comprises a display panel comprising a glass substrate and a source driver IC which is provided along the edge of the glass substrate. The FPC is connected between the source driver ICs. At the substrate end side of the source driver IC, a bump for GND, a bump for analog power supply, a bump for digital power supply, a bump for reference voltage at the positive polarity side, and a bump for reference voltage at the negative polarity side are formed sequentially from the outer side along the flow of current. These bumps for input and the FPC are connected with the lines for input on the glass substrate. The logic signal lines and are formed along the short side of the source driver IC and along the long side at the display area side.
    Type: Grant
    Filed: October 25, 2006
    Date of Patent: February 1, 2011
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hirofumi Iwanaga, Shigeaki Noumi, Hitoshi Morishita, Hiroshi Ueda
  • Patent number: 7760314
    Abstract: The present invention provides a display device which has a narrow screen border, and excellent display equality. The display device according to the present invention comprises a display panel comprising a glass substrate and a source driver IC which is provided along the edge of the glass substrate. The FPC is connected between the source driver ICs. At the substrate end side of the source driver IC, a bump for GND, a bump for analog power supply, a bump for digital power supply, a bump for reference voltage at the positive polarity side, and a bump for reference voltage at the negative polarity side are formed sequentially from the outer side along the flow of current. These bumps for input and the FPC are connected with the lines for input on the glass substrate. The logic signal lines and are formed along the short side of the source driver IC and along the long side at the display area side.
    Type: Grant
    Filed: October 25, 2006
    Date of Patent: July 20, 2010
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hirofumi Iwanaga, Shigeaki Noumi, Hitoshi Morishita, Hiroshi Ueda
  • Patent number: 7499056
    Abstract: In forward scanning, a timing control unit outputs the display data in the same sequence as the input display data. In backward scanning, on the other hand, the timing control unit inverts the output sequence of the display data for one line (for one horizontal cycle). Upon input of a scan direction control signal indicating backward scanning, the timing control unit executes sequence change processing by using line memory. The display data in which the sequence of the pixel data is reversed is outputted together with the control signals. It is able to select whether to output data in an inverted sequence or in a normal sequence according to the scan direction control signal.
    Type: Grant
    Filed: June 4, 2004
    Date of Patent: March 3, 2009
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Takayuki Fukuda, Hirofumi Iwanaga, Jiro Takaki
  • Patent number: 7206056
    Abstract: The display device includes the lead line connected to pixels, the line terminal connected to the lead line and connected to the terminal of the drive circuit mounted directly on the insulating substrate by the conductive material through the transparent conductive film, the external terminal to be connected to an external unit, an external line connected to the external terminal, and an external line terminal connected to the external line and connected directly to the terminal of the drive circuit by the conductive material. The surface of the line terminal to be connected to the transparent conductive film is formed by the high resistance conductive film, and the surface of the external line terminal to be connected to the terminal of the drive circuit by the conductive material is formed by the low resistance conductive film.
    Type: Grant
    Filed: April 12, 2004
    Date of Patent: April 17, 2007
    Assignee: Advanced Display Inc.
    Inventors: Hitoshi Morishita, Hiroshi Ueda, Hirofumi Iwanaga, Shigeaki Noumi, Takehisa Yamaguchi
  • Publication number: 20070040981
    Abstract: The present invention provides a display device which has a narrow screen border, and excellent display equality. The display device according to the present invention comprises a display panel comprising a glass substrate and a source driver IC which is provided along the edge of the glass substrate. The FPC is connected between the source driver ICs. At the substrate end side of the source driver IC, a bump for GND, a bump for analog power supply, a bump for digital power supply, a bump for reference voltage at the positive polarity side, and a bump for reference voltage at the negative polarity side are formed sequentially from the outer side along the flow of current. These bumps for input and the FPC are connected with the lines for input on the glass substrate. The logic signal lines and are formed along the short side of the source driver IC and along the long side at the display area side.
    Type: Application
    Filed: October 25, 2006
    Publication date: February 22, 2007
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hirofumi Iwanaga, Shigeaki Noumi, Hitoshi Morishita, Hiroshi Ueda
  • Publication number: 20070040980
    Abstract: The present invention provides a display device which has a narrow screen border, and excellent display equality. The display device according to the present invention comprises a display panel comprising a glass substrate and a source driver IC which is provided along the edge of the glass substrate. The FPC is connected between the source driver ICs. At the substrate end side of the source driver IC, a bump for GND, a bump for analog power supply, a bump for digital power supply, a bump for reference voltage at the positive polarity side, and a bump for reference voltage at the negative polarity side are formed sequentially from the outer side along the flow of current. These bumps for input and the FPC are connected with the lines for input on the glass substrate. The logic signal lines and are formed along the short side of the source driver IC and along the long side at the display area side.
    Type: Application
    Filed: October 25, 2006
    Publication date: February 22, 2007
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hirofumi Iwanaga, Shigeaki Noumi, Hitoshi Morishita, Hiroshi Ueda
  • Publication number: 20060233003
    Abstract: A matrix display device includes an array substrate which controls switching elements connected to pixel electrodes surrounded by gate and source lines by a select signal, and supplies a video signal to the pixel electrodes, a unit that switches between a first and a second scan modes according to an input signal, flexible substrates provided with a gate driver for supplying a signal to the gate line and electrode terminals, and gate control signal lines formed on the array substrate and connecting together corresponding electrode terminals on adjacent flexible substrates. The electrode terminals are formed along single edges of the flexible substrates on a side of the array substrate. The gate control signal lines are formed on an opposite side of the gate driver. The gate control signal line includes first and second gate scan start signal lines which become active during first and second scan modes, respectively.
    Type: Application
    Filed: February 24, 2006
    Publication date: October 19, 2006
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Hirofumi Iwanaga, Shigeaki Noumi, Hiroshi Ueda
  • Publication number: 20060215067
    Abstract: Yield in mounting a FPC onto an insulating substrate is increased as well as noise is suppressed, thereby the display device having high quality can be obtained. The display device includes: an insulating substrate on which a display region having pixels is formed; signal wires formed on the insulating substrate and connected to the pixels in the display region; terminals formed, in order to supply signals to the signal wires, outside the display region on the insulating substrate; a driving circuit 3 directly connected to the terminals or a driving circuit connected to the terminals via a film; and a resistor element 9 formed, on the insulating substrate, between adjacent input signal wires 5 for inputting signals to the driving circuit 3.
    Type: Application
    Filed: February 22, 2006
    Publication date: September 28, 2006
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Hiroshi Ueda, Hirofumi Iwanaga, Shigeaki Noumi, Hitoshi Morishita
  • Patent number: 7099730
    Abstract: A terminal table unit is associated with an output apparatus such as valves and solenoids and an input apparatus such as switches and includes not only a main body with a control device and a memory device but also a cassette with a memory medium that is detachably attached to the main body. The control device receives input data from the input apparatus for controlling the output apparatus and drives the output apparatus according to the received input data. The received input data are temporarily stored in the memory device in specified units. When the input data are found to include abnormal data, the control device causes data stored in the memory device to be transferred to the memory medium of the cassette such that the memory cassette can be removed and the abnormal data stored on the memory medium can be analyzed elsewhere.
    Type: Grant
    Filed: March 12, 2004
    Date of Patent: August 29, 2006
    Assignee: OMRON Corporation
    Inventors: Masanori Yamashita, Hiroshi Hashimoto, Masaru Imoto, Hajime Izutani, Fumihiko Okumura, Tomoaki Yoshikawa, Hirofumi Iwanaga
  • Publication number: 20040252112
    Abstract: In forward scanning, a timing control unit outputs the display data in the same sequence as the input display data. In backward scanning, on the other hand, the timing control unit inverts the output sequence of the display data for one line (for one horizontal cycle). Upon input of a scan direction control signal indicating backward scanning, the timing control unit executes sequence change processing by using line memory. The display data in which the sequence of the pixel data is reversed is outputted together with the control signals. It is able to select whether to output data in an inverted sequence or in a normal sequence according to the scan direction control signal.
    Type: Application
    Filed: June 4, 2004
    Publication date: December 16, 2004
    Applicant: Mitsubish Denki Kabushiki Kaisha
    Inventors: Takayuki Fukuda, Hirofumi Iwanaga, Jiro Takaki
  • Publication number: 20040246427
    Abstract: The present invention provides a display device which has a narrow screen border, and excellent display equality. The display device according to the present invention comprises a display panel comprising a glass substrate and a source driver IC which is provided along the edge of the glass substrate. The FPC is connected between the source driver ICs. At the substrate end side of the source driver IC, a bump for GND, a bump for analog power supply, a bump for digital power supply, a bump for reference voltage at the positive polarity side, and a bump for reference voltage at the negative polarity side are formed sequentially from the outer side along the flow of current. These bumps for input and the FPC are connected with the lines for input on the glass substrate. The logic signal lines and are formed along the short side of the source driver IC and along the long side at the display area side.
    Type: Application
    Filed: June 3, 2004
    Publication date: December 9, 2004
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hirofumi Iwanaga, Shigeaki Noumi, Hitoshi Morishita, Hiroshi Ueda
  • Publication number: 20040233697
    Abstract: A terminal table unit is associated with an output apparatus such as valves and solenoids and an input apparatus such as switches and includes not only a main body with a control device and a memory device but also a cassette with a memory medium that is detachably attached to the main body. The control device receives input data from the input apparatus for controlling the output apparatus and drives the output apparatus according to the received input data. The received input data are temporarily stored in the memory device in specified units. When the input data are found to include abnormal data, the control device causes data stored in the memory device to be transferred to the memory medium of the cassette such that the memory cassette can be removed and the abnormal data stored on the memory medium can be analyzed elsewhere.
    Type: Application
    Filed: March 12, 2004
    Publication date: November 25, 2004
    Inventors: Masanori Yamashita, Hiroshi Hashimoto, Masaru Imoto, Hajime Izutani, Fumihiko Okumura, Tomoaki Yoshikawa, Hirofumi Iwanaga
  • Publication number: 20040207796
    Abstract: The display device includes the lead line connected to pixels, the line terminal connected to the lead line and connected to the terminal of the drive circuit mounted directly on the insulating substrate by the conductive material through the transparent conductive film, the external terminal to be connected to an external unit, an external line connected to the external terminal, and an external line terminal connected to the external line and connected directly to the terminal of the drive circuit by the conductive material. The surface of the line terminal to be connected to the transparent conductive film is formed by the high resistance conductive film, and the surface of the external line terminal to be connected to the terminal of the drive circuit by the conductive material is formed by the low resistance conductive film.
    Type: Application
    Filed: April 12, 2004
    Publication date: October 21, 2004
    Applicant: ADVANCED DISPLAY INC.
    Inventors: Hitoshi Morishita, Hiroshi Ueda, Hirofumi Iwanaga, Shigeaki Noumi, Takehisa Yamaguchi
  • Patent number: 6404652
    Abstract: A relay terminal includes a plurality of relays, a connector for entering control signals to control the relays and outputting contact inputs from their relay contacts, and a terminal block corresponding to the input and output signals of the relays, which are held as a single unit. The holding construction of the plurality of relays and the terminal block employs a two step overlapping holding construction in which the relays are held in an upper step and the terminal block is held in a lower step, resulting in a reduction in the width of the relay terminal and an increase in a package density when the relay terminal is mounted on a vertical installation wall within a control panel.
    Type: Grant
    Filed: November 8, 1999
    Date of Patent: June 11, 2002
    Assignee: Omron Corporation
    Inventors: Yasuhiro Takebayashi, Kazushige Matsuoka, Taisuke Ueda, Ryo Sugihara, Hirofumi Iwanaga, Tsuyoshi Maekawa