Patents by Inventor Hirofumi Nagaoka
Hirofumi Nagaoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11197011Abstract: A decoding method includes obtaining a rectangular region to be decoded in a picture, setting a first template region in accordance with a position of the rectangular region, setting a second template region corresponding to the first template region in a reference picture, setting third template regions each of which is obtained by moving the second template region using a corresponding vector in the reference picture, calculating image correlation values each of which is obtained between a corresponding one of the third template regions and the first template region, determining a motion vector of the rectangular region, wherein the setting a first template region includes setting a region adjacent to a predetermined block including the rectangular region as the first template region when a size of the rectangular region is a predetermined threshold size or smaller, or when a picture including the rectangular region corresponds to a non-reference picture.Type: GrantFiled: September 25, 2020Date of Patent: December 7, 2021Assignee: Socionext Inc.Inventor: Hirofumi Nagaoka
-
Publication number: 20210014514Abstract: A decoding method includes obtaining a rectangular region to be decoded in a picture, setting a first template region in accordance with a position of the rectangular region, setting a second template region corresponding to the first template region in a reference picture, setting third template regions each of which is obtained by moving the second template region using a corresponding vector in the reference picture, calculating image correlation values each of which is obtained between a corresponding one of the third template regions and the first template region, determining a motion vector of the rectangular region, wherein the setting a first template region includes setting a region adjacent to a predetermined block including the rectangular region as the first template region when a size of the rectangular region is a predetermined threshold size or smaller, or when a picture including the rectangular region corresponds to a non-reference picture.Type: ApplicationFiled: September 25, 2020Publication date: January 14, 2021Inventor: Hirofumi NAGAOKA
-
Publication number: 20160337667Abstract: An image coding device includes: a storage unit; and an operation unit configured to execute a procedure, the procedure including: calculating a plurality of syntax elements corresponding to a plurality of divided regions obtained by dividing an image along horizontal dividing lines; storing the plurality of syntax elements in the storage unit; and executing first entropy coding processing for a first divided region among the plurality of divided regions, in parallel with second entropy coding processing for a second divided region adjacent below the first divided region among the plurality of divided regions, wherein the second entropy coding processing includes processing of reading a syntax element corresponding to the first divided region among the plurality of syntax elements from the storage unit.Type: ApplicationFiled: April 20, 2016Publication date: November 17, 2016Applicant: FUJITSU LIMITEDInventor: Hirofumi Nagaoka
-
Patent number: 9332272Abstract: An encoding apparatus includes a processor that calculates and stores, an evaluation value for each candidate vector, based on a given block to be encoded among blocks formed by dividing an image, and a reference block on a reference image represented by each candidate vector that is a candidate motion vector of the given block; identifies an evaluation value of a first candidate motion vector of the given block, based on the stored evaluation values; calculates an evaluation value of a second candidate motion vector, based on the evaluation value of each candidate vector and the second candidate motion vector selected for the given block from among motion vectors of blocks adjacent to the given block; and determines the first or the second candidate motion vector to be the motion vector of the given block, based on the respective evaluation values of the first and the second candidate motion vectors.Type: GrantFiled: February 15, 2014Date of Patent: May 3, 2016Assignee: FUJITSU LIMITEDInventor: Hirofumi Nagaoka
-
Publication number: 20140269922Abstract: An encoding apparatus includes a processor that calculates and stores, an evaluation value for each candidate vector, based on a given block to be encoded among blocks formed by dividing an image, and a reference block on a reference image represented by each candidate vector that is a candidate motion vector of the given block; identifies an evaluation value of a first candidate motion vector of the given block, based on the stored evaluation values; calculates an evaluation value of a second candidate motion vector, based on the evaluation value of each candidate vector and the second candidate motion vector selected for the given block from among motion vectors of blocks adjacent to the given block; and determines the first or the second candidate motion vector to be the motion vector of the given block, based on the respective evaluation values of the first and the second candidate motion vectors.Type: ApplicationFiled: February 15, 2014Publication date: September 18, 2014Applicant: FUJITSU LIMITEDInventor: Hirofumi NAGAOKA
-
Patent number: 8514947Abstract: A semiconductor device including a first processing unit processing an input signal based on a plurality of image compression standards, a signal generation unit outputting a switching signal to the first processing unit, a first calculation unit performing an operation on the input signal in accordance with a first coefficient that is based on the switching signal, a second calculation unit performing an operation on an output of the first calculation unit in accordance with a second coefficient that is based on the switching signal, a selection unit selecting one of the output of the first calculation unit and an output of the second calculation unit based on the switching signal, and a third calculation unit selecting one or both of the input signal and the output of the first calculation unit based on the switching signal and performing a predetermined calculation on the selected signal.Type: GrantFiled: December 24, 2008Date of Patent: August 20, 2013Assignee: Fujitsu LimitedInventors: Noboru Yoneoka, Hirofumi Nagaoka
-
Patent number: 8458512Abstract: In order to enable a rewrite of stored data to be omitted and to reduce a processing time of error concealment even if an error is detected in a process for sequentially storing variable-length data in a memory and the rewrite of the stored data is necessary, variable-length data from which an error is not detected is sequentially stored at and after a predetermined position in the memory, and error information that includes a restoration address that corresponds to an area in which variable-length data from which an error is detected is to be stored and that specifies variable-length data stored earliest in the memory from among data to be replaced with error concealment data is stored at a position preceding the predetermined position, when the error is detected.Type: GrantFiled: March 24, 2010Date of Patent: June 4, 2013Assignee: Fujitsu LimitedInventors: Hirofumi Nagaoka, Yasuhiro Watanabe, Taro Hagiya
-
Patent number: 8249373Abstract: An image decoding apparatus includes a memory, a detecting part which receives data of a plurality of macroblocks included in an image and detects whether or not a first macroblock included in the plurality of macroblocks has an intra-block, and a control part which writes a DCT coefficient of the first macroblock into the memory when the detecting part determines that the first macroblock has the intra-block, and does not write the DCT coefficient of the first macroblock into the memory when the detecting part determines that the first macroblock has no intra-block.Type: GrantFiled: March 26, 2009Date of Patent: August 21, 2012Assignee: Fujistu LimitedInventor: Hirofumi Nagaoka
-
Publication number: 20100241897Abstract: In order to enable a rewrite of stored data to be omitted and to reduce a processing time of error concealment even if an error is detected in a process for sequentially storing variable-length data in a memory and the rewrite of the stored data is necessary, variable-length data from which an error is not detected is sequentially stored at and after a predetermined position in the memory, and error information that includes a restoration address that corresponds to an area in which variable-length data from which an error is detected is to be stored and that specifies variable-length data stored earliest in the memory from among data to be replaced with error concealment data is stored at a position preceding the predetermined position, when the error is detected.Type: ApplicationFiled: March 24, 2010Publication date: September 23, 2010Applicant: FUJITSU LIMITEDInventors: Hirofumi Nagaoka, Yasuhiro Watanabe, Taro Hagiya
-
Publication number: 20090245663Abstract: An image decoding apparatus includes a memory, a detecting part which receives data of a plurality of macroblocks included in an image and detects whether or not a first macroblock included in the plurality of macroblocks has an intra-block, and a control part which writes a DCT coefficient of the first macroblock into the memory when the detecting part determines that the first macroblock has the intra-block, and does not write the DCT coefficient of the first macroblock into the memory when the detecting part determines that the first macroblock has no intra-block.Type: ApplicationFiled: March 26, 2009Publication date: October 1, 2009Applicant: FUJITSU LIMITEDInventor: Hirofumi Nagaoka
-
Publication number: 20090172506Abstract: A semiconductor device including a first processing unit processing an input signal based on a plurality of image compression standards, a signal generation unit outputting a switching signal to the first processing unit, a first calculation unit performing an operation on the input signal in accordance with a first coefficient that is based on the switching signal, a second calculation unit performing an operation on an output of the first calculation unit in accordance with a second coefficient that is based on the switching signal, a selection unit selecting one of the output of the first calculation unit and an output of the second calculation unit based on the switching signal, and a third calculation unit selecting one or both of the input signal and the output of the first calculation unit based on the switching signal and performing a predetermined calculation on the selected signal.Type: ApplicationFiled: December 24, 2008Publication date: July 2, 2009Applicant: FUJITSU LIMITEDInventors: Noboru YONEOKA, Hirofumi Nagaoka
-
Publication number: 20070225839Abstract: An ExOR circuit performs volume comparison between a sound level expressed by audio data and zero level by detecting whether or not the sign of audio data at a given time stored in a first register is inverted from a sign of audio data which is one sample before the audio data at the given time stored in a second register. A shift register for shifting audio data outputted from the first register changes the sound level by changing the shift amount every time the ExOR circuit detects the sign inversion.Type: ApplicationFiled: July 12, 2006Publication date: September 27, 2007Inventor: Hirofumi Nagaoka
-
Patent number: 4827730Abstract: A troubleshooting apparatus counts the number of times an abnormality occurs whenever each diagnosed portion of an automobile air-conditioning system repeats an abnormal and a normal status, stores each diagnosed portion in which an abnormality is detected and the number of times the abnormality of each diagnosed portion occurs in a nonvolatile memory, recognizes each diagnosed portion having the number of times the abnormality exceeds a predetermined value at the time of troubleshooting as a fault, and recognizes each diagnosed portion having an abnormality that occurs at the time of troubleshooting as a fault. Abnormalities that occur in conjunction with the dismounting and remounting of diagnosed portions during checking processes are absorbed in the number of times the abnormality occurs within the predetermined value so that a wrong diagnosis can be avoided.Type: GrantFiled: December 16, 1987Date of Patent: May 9, 1989Assignees: Mazda Motor Corporation, Diesel Kiki Co., Ltd.Inventors: Shigetoshi Doi, Yoshiaki Anan, Hirofumi Nagaoka, Katsumi Iida, Yoshihiko Sakurai