Patents by Inventor Hirofumi Namizaki

Hirofumi Namizaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4929571
    Abstract: A semiconductor laser includes a semiconductor substrate on which a longitudinal groove is provided in the resonator direction, a first semiconductor layer disposed on a region of the semiconductor substrate where the groove is not provided and forming a rectifying junction therewith, a first cladding layer provided on the semiconductor substrate in the groove, an active layer provided on the first cladding layer in the groove, and a second cladding layer provided directly on the active layer and opposite the first semiconductor layer with an interposed insulating layer, such as a gap void of solid material or a gap and current blocking material having only negligible parasitic capacitance.
    Type: Grant
    Filed: March 10, 1989
    Date of Patent: May 29, 1990
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Etsuji Omura, Hirofumi Namizaki
  • Patent number: 4847845
    Abstract: A semiconductor laser includes a semiconductor substrate on which a first semiconductor layer forming a rectifying junction is disposed, a groove extending through the first layer and into the substrate, a first cladding layer disposed on the semiconductor substrate in the groove, an active layer provided on the first cladding layer in the groove, and a second cladding layer provided directly on the active layer and opposite the first semiconductor layer, with an interposed gap void of solid material or an interposed gap and a current blocking material having only negligible parasitic capacitance disposed at spaced locations in the gap.
    Type: Grant
    Filed: December 9, 1987
    Date of Patent: July 11, 1989
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Etsuji Omura, Hirofumi Namizaki
  • Patent number: 4809289
    Abstract: A semiconductor laser device comprises a semi-insulating substrate and at least two kinds of the thin compound semiconductor layers having different width of band gap, which are alternately superimposed on the seim-insulating substrate to form a multiquantum well layer, wherein disordered regions are formed in the multiquantum well layer except for a stripe region having a narrow width at its intermediate portion by selectively diffusing two kinds of impurities having different conductive properties from both sides of the multiquantum well layer until the impurities reach the semi-insulating substrate.
    Type: Grant
    Filed: May 29, 1987
    Date of Patent: February 28, 1989
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Katsuhiko Goto, Hirofumi Namizaki
  • Patent number: 4758535
    Abstract: A method for producing a semiconductor laser of InGaAsP/InP type having a structure, in which an active layer isolated from outside is embedded in a groove in a substrate wafer, which comprises steps of: forming the groove in the substrate having a crystallographic plane of (100), on the upper surface of which a current blocking layer has been formed, along the <011> direction of the substrate, in a manner to be terminated at both sides of substrate wafer in the vicinity of the end faces of a laser resonator; and, thereafter, sequentially forming on the groove and other regions of the substrate clad layers and the active layer.
    Type: Grant
    Filed: March 16, 1987
    Date of Patent: July 19, 1988
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yasushi Sakakibara, Yasuo Nakajima, Hirofumi Namizaki
  • Patent number: 4728625
    Abstract: A method of fabricating a semiconductor laser stably operable at high temperatures over long periods of time and with a low leakage current. A semiconductor wafer is prepared including a semiconductor substrate of a first conductivity type and a current blocking layer formed thereon, the current blocking layer including at least one semiconductor layer of a second conductivity type. A groove is formed in the upper surface of the wafer having a depth corresponding to at least the thickness of the current blocking layer. At least surface regions of the wafer are removed in the vicinity of the groove and upper sidewall surface regions of the groove using a semiconductor solution. A plurality of semiconductor crystal layers are then grown on the wafer, including a layer consistuting an active region in the groove, by liquid phase epitaxy.
    Type: Grant
    Filed: September 19, 1985
    Date of Patent: March 1, 1988
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hirofumi Namizaki, Yasushi Sakakibara
  • Patent number: 4723251
    Abstract: A semiconductor laser device in which the thickness and position of an active layer grown in a groove are made more controllable. The inventive device includes a buffer layer of a first conductivity type formed on a semiconductor substrate of the same conductivity type, a first current blocking layer of a second conductivity type formed over the first buffer layer, the aforementioned groove being formed through the first and current blocking layer to the buffer layer, the active layer buried in the groove, and mesas formed on both side of the groove. With this structure, during crystal growth of the active layer, atoms which would otherwise diffuse into the groove and make it difficult to control the thickness and position of the active layer diffuse into portions outside the mesas and grow thereon.
    Type: Grant
    Filed: October 24, 1985
    Date of Patent: February 2, 1988
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yasushi Sakakibara, Hirofumi Namizaki, Etsuji Oomura, Hideyo Higuchi
  • Patent number: 4561096
    Abstract: In order to prevent the output characteristic of a semiconductor laser from being saturated at higher temperatures due to the thyristor effect of a combination of the semiconductor layers thereof, an intermediate layer of a conductivity type the same as that of the substrate and opposite that of the first semiconductor layer is provided between the substrate and the first layer. Due to the relatively low carrier density of the intermediate layer, oscillation can be stably carried out even at higher temperatures without triggering the thyristor structure.
    Type: Grant
    Filed: June 21, 1983
    Date of Patent: December 24, 1985
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hirofumi Namizaki, Ryoichi Hirano, Hideyo Higuchi, Etsuji Oomura, Yasushi Sakakibara, Wataru Susaki
  • Patent number: 4504328
    Abstract: A first growth melting solution which has been used for the growth of a first layer is first replaced with a third melting solution and then with a second growth melting solution for the growth of a second layer. Using the third melting solution of a composition intermediate the first and second melting solutions effectively suppresses supersaturate or unsaturation of the solute during replacement of the melting solutions.
    Type: Grant
    Filed: September 20, 1983
    Date of Patent: March 12, 1985
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Ryoichi Hirano, Hirofumi Namizaki, Wataru Susaki, Toshio Tanaka
  • Patent number: 4277759
    Abstract: A first N-AlGaAs and a second N-GaAs layer are successively grown on an I-GaAs substrate. A third N-AlGaAs, a fourth P-AlGaAs and a fifth N-GaAs layer superpose one another on the second layer except for one lateral portion. Those portions of the five layers remote from the exposed second layer portion are changed into a P.sup.+ type and surrounded by a P zone. A positive and a negative electrode are located on the fifth layer and the exposed second layer portion respectively. The negative electrode is nearest to a laser region located in the second layer and can be secured to a heat sink.
    Type: Grant
    Filed: May 17, 1979
    Date of Patent: July 7, 1981
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Toshio Tanaka, Hirofumi Namizaki, Saburo Takamiya, Wataru Susaki
  • Patent number: 4183038
    Abstract: N type GaAlAs, GaAs and GaAlAs layers are successively grown on a semi-insulating GaAs substrate doped with Cr. Zn is diffused into predetermined portions of those layers to a depth reaching the substrate to form pn junctions between the original n type regions of the layers and their regions are converted to the p from the n type conductivity. The pn junction formed in the GaAs layer serves as a light emitting region.
    Type: Grant
    Filed: March 29, 1978
    Date of Patent: January 8, 1980
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hirofumi Namizaki, Wataru Susaki, Hirofumi Kan
  • Patent number: 4166278
    Abstract: N type CaAlAs, GaAs and GaAlAs layers are successively grown on a semi-insulating GaAs substrate doped with Cr to form a semiconductor chip. Predetermined portions of those layers are selectively etched away to a depth reaching the substrate. Then a P type GaAlAs layer is epitaxially grown on the etched portions to restore the original shape of the chip. The chip is heated to form a pn junction in at least the GaAs layer serving as a light emitting region.
    Type: Grant
    Filed: March 29, 1978
    Date of Patent: August 28, 1979
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Wataru Susaki, Hirofumi Namizaki
  • Patent number: 3990096
    Abstract: The disclosed semiconductor luminescent device comprises a semiconductive body including a first semiconductor layer formed of a first semiconductive material and sandwiched between a second and a third semiconductor layer formed of a second semiconductive material having a resistivity higher than that of the first material by two orders of magnitude or more. Each of the first, second and third layers includes an n and a p type region. A first and a second electrode are connected to the p and n type regions of the first layer with low resistances respectively. Light is efficiently emitted from the first layer.
    Type: Grant
    Filed: August 25, 1975
    Date of Patent: November 2, 1976
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hirofumi Namizaki, Akiko Ito
  • Patent number: 3961996
    Abstract: N type Ga.sub.0.7 Al.sub.0.3 As, N type GaAs, N type Ga.sub.0.7 Al.sub.0.3 As and P type Ga.sub.1-0.3 Al.sub.0.3 As are epitaxially grown on an N type GaAs substrate in the named order one after another to form superposed layers. A selected portion of the uppermost layer is etched away along with those portions of the following two layers and one part of the lowermost layer located below the selected uppermost layer portion. P type Ga.sub.1-0.3 Al.sub.0.3 As highly doped with zinc is epitaxially grown to fill the removed portions of the layers. Then the zinc is diffused into the adjacent portions of the layers to form a radiative recombination region of a layer on that portion of the GaAs layer converted to the P type.
    Type: Grant
    Filed: October 17, 1974
    Date of Patent: June 8, 1976
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hirofumi Namizaki, Hirofumi Kan