Patents by Inventor Hirofumi NISHIYAMA

Hirofumi NISHIYAMA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130256732
    Abstract: A nitride group semiconductor light emitting device includes a nitride group semiconductor layer, and an electrode structure. The electrode structure is arranged on or above the semiconductor layer, and includes a plurality of deposited metal layers. The plurality of deposited metal layers of the electrode structure includes first and second and metal layers. The first metal layer is arranged on the semiconductor layer side. The second metal layer is arranged on or above the first metal layer. The first metal layer contains Cr, and a first metal material. The first metal material has a reflectivity higher than Cr at the light emission peak wavelength of the light emitting device. According to this construction, the first metal layer can have a higher reflectivity as compared with the case where the first metal layer is only formed of Cr, but can keep tight contact with the semiconductor layer.
    Type: Application
    Filed: October 13, 2011
    Publication date: October 3, 2013
    Applicant: NICHIA CORPORATION
    Inventors: Yasuhiro Miki, Masahiko Onishi, Hirofumi Nishiyama, Shusaku Bando
  • Publication number: 20120295373
    Abstract: To provide a method of manufacturing a nitride semiconductor light emitting element, which has a small number of steps and thus, can improve productivity, the method of manufacturing a nitride semiconductor light emitting element including a nitride semiconductor light emitting element structure having an n-type nitride semiconductor layer and a p-side nitride semiconductor layer which are laminated on a substrate, an n-side pad electrode connecting surface and a p-side pad electrode connecting surface which are formed on the same plane of the substrate; a n-side pad electrode on the n-side pad electrode connecting surface; and a p-side pad electrode on the p-side pad electrode connecting surface, and in the manufacturing method, a pad electrode layer forming step, a resist pattern forming step, a pad electrode layer etching step, a protective layer forming step and a resist pattern removing step are sequentially performed.
    Type: Application
    Filed: May 18, 2012
    Publication date: November 22, 2012
    Inventors: Shusaku BANDO, Yasuhiro MIKI, Masahiko ONISHI, Hirofumi NISHIYAMA