Patents by Inventor Hirofumi Oga

Hirofumi Oga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7385856
    Abstract: A non-volatile memory device comprises a plurality of bit lines extending in a first direction, a plurality of word lines extending in a second direction substantially perpendicular to the first direction, a plurality of memory cells provided respectively so as to correspond to the positions of the intersections between the plurality of bit lines and the plurality of word lines, a plurality of source lines corresponding to a plurality of memory cells which are connected to a same bit line, a current source capable of supplying the constant current to a selected memory cell and the corresponding bit line and a voltage control circuit which keeps a voltage of a selected bit line equal to or higher than a predetermined voltage.
    Type: Grant
    Filed: March 24, 2005
    Date of Patent: June 10, 2008
    Assignee: Nec Electronics Corporation
    Inventors: Hirofumi Oga, Masahiko Kashimura, Masakazu Amanai
  • Publication number: 20050213418
    Abstract: A non-volatile memory device comprises a plurality of bit lines extending in a first direction, a plurality of word lines extending in a second direction substantially perpendicular to the first direction, a plurality of memory cells provided respectively so as to correspond to the positions of the intersections between the plurality of bit lines and the plurality of word lines, a plurality of source lines corresponding to a plurality of memory cells which are connected to a same bit line, a current source capable of supplying the constant current to a selected memory cell and the corresponding bit line and a voltage control circuit which keeps a voltage of a selected bit line equal to or higher than a predetermined voltage.
    Type: Application
    Filed: March 24, 2005
    Publication date: September 29, 2005
    Inventors: Hirofumi Oga, Masahiko Kashimura, Masakazu Amanai
  • Publication number: 20050213363
    Abstract: In a disturb test of a selected bit line selected from the plurality of bit lines, the first dummy cell corresponding to the selected bit line is selected, data is written by the constant current flowing in the first dummy cell, and a write bit line voltage is simulated which is the voltage generated in the selected bit line when data is written to the memory cell.
    Type: Application
    Filed: March 23, 2005
    Publication date: September 29, 2005
    Inventor: Hirofumi Oga