Patents by Inventor Hirofumi SHINAGAWA

Hirofumi SHINAGAWA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10741462
    Abstract: A component-mounting resin substrate includes a resin substrate and a component. The resin substrate includes a thermoplastic resin body. The component is mounted on the resin substrate by ultrasonic bonding. In a mounting area of the resin body in which the component is mounted, a cavity that is hollowed from a mounting surface on which the component is mounted is defined. A plating layer that includes a material harder than the resin body is disposed on at least a portion of a wall surface of the cavity.
    Type: Grant
    Filed: February 26, 2018
    Date of Patent: August 11, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kuniaki Yosui, Hirofumi Shinagawa, Yuki Ito
  • Patent number: 10338031
    Abstract: A component-embedded substrate includes a multilayer body including a plurality of insulating layers stacked in a stacking direction, an embedded component embedded in the multilayer body, and planar conductors disposed on both sides of the embedded component in the stacking direction, the planar conductors overlapping the embedded component. The planar conductors each include a plurality of openings that overlap the embedded component over substantially the entire region occupied by the embedded component, as seen in the stacking direction.
    Type: Grant
    Filed: March 1, 2017
    Date of Patent: July 2, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shigeru Tago, Hirofumi Shinagawa, Toshiro Adachi
  • Patent number: 10231342
    Abstract: A component built-in substrate incorporates a chip capacitor in a multilayer substrate including laminated base material layers made of thermoplastic resin. The chip capacitor includes an uneven portion including a recessed portion and a projected portion on one side in a laminated direction. On one side of the chip capacitor in the multilayer substrate, a density of low fluid member with a melting point higher than a fluidization temperature of the base material layers is higher in a region overlapping the recessed portion of the chip capacitor than in a region overlapping the projected portion of the chip capacitor when viewed in the lamination direction.
    Type: Grant
    Filed: April 14, 2017
    Date of Patent: March 12, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shigeru Tago, Hirofumi Shinagawa, Yuki Wakabayashi
  • Patent number: 10219367
    Abstract: A multilayer resin substrate includes resin substrates laminated together, an overlapping portion in which a signal line as a conductor pattern and another conductor pattern overlap each other in a laminating direction of the resin substrates, and a non-overlapping portion in which the signal line and the other conductor pattern do no overlap each other in the laminating direction. A thin portion is provided at a position in the non-overlapping portion near the overlapping portion. The thin portion is a portion of the multilayer resin substrate which has a thickness smaller than the thickness in the overlapping portion in the laminating direction of the resin substrates.
    Type: Grant
    Filed: November 8, 2017
    Date of Patent: February 26, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Hirofumi Shinagawa, Shigeru Tago
  • Publication number: 20180182681
    Abstract: A component-mounting resin substrate includes a resin substrate and a component. The resin substrate includes a thermoplastic resin body. The component is mounted on the resin substrate by ultrasonic bonding. In a mounting area of the resin body in which the component is mounted, a cavity that is hollowed from a mounting surface on which the component is mounted is defined. A plating layer that includes a material harder than the resin body is disposed on at least a portion of a wall surface of the cavity.
    Type: Application
    Filed: February 26, 2018
    Publication date: June 28, 2018
    Inventors: Kuniaki YOSUI, Hirofumi SHINAGAWA, Yuki ITO
  • Patent number: 9986139
    Abstract: A camera module includes a multilayer base body including a first mounting portion, a second mounting portion, and a connecting portion. The first mounting portion and the second mounting portion are connected to the connecting portion. A connector element is arranged in the second mounting portion. The first mounting portion includes a cavity, and a penetration hole penetrating from the cavity to one surface of the first mounting portion. An image sensor IC is arranged in the cavity, and the lens unit is arranged on the one surface of the first mounting portion at a location at or near the penetration hole. Peripheral circuit components and conductor patterns are mounted to or incorporated in the first mounting portion.
    Type: Grant
    Filed: October 2, 2017
    Date of Patent: May 29, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shigeru Tago, Hirofumi Shinagawa, Jerry Hsieh, Satoshi Sasaki, Jun Sasaki, Nobuo Ikemoto, Yuki Wakabayashi
  • Patent number: 9974185
    Abstract: A component-embedded substrate includes a laminate and an electronic component. The electronic component is embedded in the laminate. The laminate includes a frame-shaped conductor pattern. When the laminate is viewed in a laminating direction, the frame-shaped conductor pattern is arranged so as to substantially surround the entire periphery of the electronic component. The frame-shaped conductor pattern includes a first individual conductor pattern and a second individual conductor pattern. The first individual conductor pattern and the second individual conductor pattern are separated from each other. The first individual conductor pattern is arranged close to a first external terminal electrode of the electronic component, and the second individual conductor pattern is arranged close to a second external terminal electrode of the electronic component.
    Type: Grant
    Filed: February 4, 2016
    Date of Patent: May 15, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shigeru Tago, Hirofumi Shinagawa, Yuki Wakabayashi, Kuniaki Yosui, Yuki Ito, Toshiro Adachi, Wataru Yanase, Masaki Kawata
  • Patent number: 9961780
    Abstract: A method for manufacturing a resin multilayer board formed from a thermoplastic resin, which method allows for improvement in accuracy of the position of a component relative to the resin multilayer board, is provided. A method for manufacturing a resin multilayer board includes: a step of bonding a component to a pressure-sensitive adhesive layer of a pressure-sensitive adhesive sheet having the pressure-sensitive adhesive layer on a surface thereof; a step of opposing a thermoplastic resin sheet to the pressure-sensitive adhesive layer, and fixing the component bonded to the pressure-sensitive adhesive sheet and the thermoplastic resin sheet to each other by heating; a step of peeling the pressure-sensitive adhesive sheet from the component fixed to the thermoplastic resin sheet; and stacking and thermally welding a plurality of thermoplastic resin sheets including the thermoplastic resin sheet to which the component has been transferred.
    Type: Grant
    Filed: October 29, 2015
    Date of Patent: May 1, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Hirofumi Shinagawa, Shigeru Tago, Masaki Kawata, Yuki Ito
  • Patent number: 9922918
    Abstract: A substrate for a stacked module includes a stacked insulator in which a plurality of insulator layers mainly composed of a thermoplastic resin are stacked, a conductor pattern arranged along the plurality of insulator layers in the stacked insulator, an embedded component connected to the conductor pattern, a pad provided on a surface of the stacked insulator and configured to be ultrasonically bonded to a bump of a mounted component to be mounted on the surface of the stacked insulator, and an auxiliary conductor pattern between the pad and the embedded component and extending in a range that covers the pad and the embedded component as viewed in a stacking direction of the plurality of insulator layers.
    Type: Grant
    Filed: March 6, 2017
    Date of Patent: March 20, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Shigeru Tago, Hirofumi Shinagawa, Yuki Wakabayashi
  • Publication number: 20180070435
    Abstract: A multilayer resin substrate includes resin substrates laminated together, an overlapping portion in which a signal line as a conductor pattern and another conductor pattern overlap each other in a laminating direction of the resin substrates, and a non-overlapping portion in which the signal line and the other conductor pattern do no overlap each other in the laminating direction. A thin portion is provided at a position in the non-overlapping portion near the overlapping portion. The thin portion is a portion of the multilayer resin substrate which has a thickness smaller than the thickness in the overlapping portion in the laminating direction of the resin substrates.
    Type: Application
    Filed: November 8, 2017
    Publication date: March 8, 2018
    Inventors: Hirofumi SHINAGAWA, Shigeru TAGO
  • Publication number: 20180027154
    Abstract: A camera module includes a multilayer base body including a first mounting portion, a second mounting portion, and a connecting portion. The first mounting portion and the second mounting portion are connected to the connecting portion. A connector element is arranged in the second mounting portion. The first mounting portion includes a cavity, and a penetration hole penetrating from the cavity to one surface of the first mounting portion. An image sensor IC is arranged in the cavity, and the lens unit is arranged on the one surface of the first mounting portion at a location at or near the penetration hole. Peripheral circuit components and conductor patterns are mounted to or incorporated in the first mounting portion.
    Type: Application
    Filed: October 2, 2017
    Publication date: January 25, 2018
    Inventors: Shigeru TAGO, Hirofumi SHINAGAWA, Jerry HSIEH, Satoshi SASAKI, Jun SASAKI, Nobuo IKEMOTO, Yuki WAKABAYASHI
  • Patent number: 9854677
    Abstract: A module component includes a substrate including a liquid crystal polymer resin sheet, and an electronic component mounted on the substrate by ultrasonic bonding, wherein the electronic component includes a plurality of first substrate connecting electrodes including respective planar conductors provided on a substrate mounting surface separately from each other, and connected at a same potential or substantially a same potential, and the substrate includes a first component connecting electrode including a planar conductor provided on a component loading surface, and bonded to the plurality of first substrate connecting electrodes.
    Type: Grant
    Filed: July 20, 2016
    Date of Patent: December 26, 2017
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shigeru Tago, Hirofumi Shinagawa, Masaki Kawata, Yuki Ito
  • Patent number: 9848489
    Abstract: A multilayer resin substrate includes resin substrates laminated together, an overlapping portion in which a signal line as a conductor pattern and another conductor pattern overlap each other in a laminating direction of the resin substrates, and a non-overlapping portion in which the signal line and the other conductor pattern do no overlap each other in the laminating direction. A thin portion is provided at a position in the non-overlapping portion near the overlapping portion. The thin portion is a portion of the multilayer resin substrate which has a thickness smaller than the thickness in the overlapping portion in the laminating direction of the resin substrates.
    Type: Grant
    Filed: October 9, 2015
    Date of Patent: December 19, 2017
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Hirofumi Shinagawa, Shigeru Tago
  • Patent number: 9813595
    Abstract: A camera module includes a multilayer base body including a first mounting portion, a second mounting portion, and a connecting portion. The first mounting portion and the second mounting portion are connected to the connecting portion. A connector element is arranged in the second mounting portion. The first mounting portion includes a cavity, and a penetration hole penetrating from the cavity to one surface of the first mounting portion. An image sensor IC is arranged in the cavity, and the lens unit is arranged on the one surface of the first mounting portion at a location at or near the penetration hole. Peripheral circuit components and conductor patterns are mounted to or incorporated in the first mounting portion.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: November 7, 2017
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shigeru Tago, Hirofumi Shinagawa, Jerry Hsieh, Satoshi Sasaki, Jun Sasaki, Nobuo Ikemoto, Yuki Wakabayashi
  • Publication number: 20170223837
    Abstract: A component built-in substrate incorporates a chip capacitor in a multilayer substrate including laminated base material layers made of thermoplastic resin. The chip capacitor includes an uneven portion including a recessed portion and a projected portion on one side in a laminated direction. On one side of the chip capacitor in the multilayer substrate, a density of low fluid member with a melting point higher than a fluidization temperature of the base material layers is higher in a region overlapping the recessed portion of the chip capacitor than in a region overlapping the projected portion of the chip capacitor when viewed in the lamination direction.
    Type: Application
    Filed: April 14, 2017
    Publication date: August 3, 2017
    Inventors: Shigeru TAGO, Hirofumi SHINAGAWA, Yuki WAKABAYASHI
  • Publication number: 20170179014
    Abstract: A substrate for a stacked module includes a stacked insulator in which a plurality of insulator layers mainly composed of a thermoplastic resin are stacked, a conductor pattern arranged along the plurality of insulator layers in the stacked insulator, an embedded component connected to the conductor pattern, a pad provided on a surface of the stacked insulator and configured to be ultrasonically bonded to a bump of a mounted component to be mounted on the surface of the stacked insulator, and an auxiliary conductor pattern between the pad and the embedded component and extending in a range that covers the pad and the embedded component as viewed in a stacking direction of the plurality of insulator layers.
    Type: Application
    Filed: March 6, 2017
    Publication date: June 22, 2017
    Inventors: Shigeru TAGO, Hirofumi SHINAGAWA, Yuki WAKABAYASHI
  • Publication number: 20170176392
    Abstract: A component-embedded substrate includes a multilayer body including a plurality of insulating layers stacked in a stacking direction, an embedded component embedded in the multilayer body, and planar conductors disposed on both sides of the embedded component in the stacking direction, the planar conductors overlapping the embedded component. The planar conductors each include a plurality of openings that overlap the embedded component over substantially the entire region occupied by the embedded component, as seen in the stacking direction.
    Type: Application
    Filed: March 1, 2017
    Publication date: June 22, 2017
    Inventors: Shigeru TAGO, Hirofumi SHINAGAWA, Toshiro ADACHI
  • Patent number: 9629249
    Abstract: A component-embedded substrate includes a first embedded component positioned in a layer close to a mounting electrode and a second embedded component positioned in a layer farther away from the mounting electrode than the first embedded component. The first and second embedded components include electrically connected terminals. Each resin film of the substrate is formed of thermoplastic resin. The first embedded component has more terminals than the second embedded component. Many of the internal wires from the first and second embedded component extend towards a mounting surface where the mounting electrode is provided. However, since in plan view the area of the first embedded component is smaller than the second embedded component, and the first embedded component is disposed closer to the mounting surface than the second embedded component, there is space for routing the internal wires at the side of the mounting surface of the substrate.
    Type: Grant
    Filed: November 12, 2015
    Date of Patent: April 18, 2017
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shigeru Tago, Yuki Wakabayashi, Hirofumi Shinagawa
  • Publication number: 20160330843
    Abstract: A module component includes a substrate including a liquid crystal polymer resin sheet, and an electronic component mounted on the substrate by ultrasonic bonding, wherein the electronic component includes a plurality of first substrate connecting electrodes including respective planar conductors provided on a substrate mounting surface separately from each other, and connected at a same potential or substantially a same potential, and the substrate includes a first component connecting electrode including a planar conductor provided on a component loading surface, and bonded to the plurality of first substrate connecting electrodes.
    Type: Application
    Filed: July 20, 2016
    Publication date: November 10, 2016
    Inventors: Shigeru TAGO, Hirofumi SHINAGAWA, Masaki KAWATA, Yuki ITO
  • Publication number: 20160157354
    Abstract: A component-embedded substrate includes a laminate and an electronic component. The electronic component is embedded in the laminate. The laminate includes a frame-shaped conductor pattern. When the laminate is viewed in a laminating direction, the frame-shaped conductor pattern is arranged so as to substantially surround the entire periphery of the electronic component. The frame-shaped conductor pattern includes a first individual conductor pattern and a second individual conductor pattern. The first individual conductor pattern and the second individual conductor pattern are separated from each other. The first individual conductor pattern is arranged close to a first external terminal electrode of the electronic component, and the second individual conductor pattern is arranged close to a second external terminal electrode of the electronic component.
    Type: Application
    Filed: February 4, 2016
    Publication date: June 2, 2016
    Inventors: Shigeru TAGO, Hirofumi SHINAGAWA, Yuki WAKABAYASHI, Kuniaki YOSUI, Yuki ITO, Toshiro ADACHI, Wataru YANASE, Masaki KAWATA