Patents by Inventor Hirofumi Tsuchiyama
Hirofumi Tsuchiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9551670Abstract: A defect inspection apparatus including: a first illumination optical system which is configured to illuminate the inspection area on a sample surface from a normal line direction or a direction near thereof with respect to said sample surface; a second illumination optical system which is configured to illuminate said inspection area from a slant direction with respect to said sample surface; a detection optical system having a plurality of first detectors which are located, in front of, on the sides of, and behind said inspection area, respectively, with respect to the illumination direction of said second illumination optical system, and where the regular reflected light component, from said sample surface, by illumination light of said second illumination optical system, is not converged; and a signal processing system which is configured to inspect a defect, upon basis of signals obtained from said plurality of first detectors.Type: GrantFiled: April 10, 2014Date of Patent: January 24, 2017Assignees: HITACHI, LTD., HITACHI HIGH-TECHNOLOGIES CORPORATIONInventors: Ichiro Ishimaru, Minori Noguchi, Ichiro Moriyama, Yoshikazu Tanabe, Yasuo Yatsugake, Yukio Kenbou, Kenji Watanabe, Hirofumi Tsuchiyama
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Publication number: 20140218723Abstract: A defect inspection apparatus including: a first illumination optical system which is configured to illuminate the inspection area on a sample surface from a normal line direction or a direction near thereof with respect to said sample surface; a second illumination optical system which is configured to illuminate said inspection area from a slant direction with respect to said sample surface; a detection optical system having a plurality of first detectors which are located, in front of, on the sides of, and behind said inspection area, respectively, with respect to the illumination direction of said second illumination optical system, and where the regular reflected light component, from said sample surface, by illumination light of said second illumination optical system, is not converged; and a signal processing system which is configured to inspect a defect, upon basis of signals obtained from said plurality of first detectors.Type: ApplicationFiled: April 10, 2014Publication date: August 7, 2014Applicant: Hitachi High-Technologies CorporationInventors: Ichiro ISHIMARU, Minori NOGUCHI, Ichiro MORIYAMA, Yoshikazu TANABE, Yasuo YATSUGAKE, Yukio KENBOU, Kenji WATANABE, Hirofumi TSUCHIYAMA
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Patent number: 8729514Abstract: A defect inspection apparatus including: a first illumination optical system which is configured to illuminate the inspection area on a sample surface from a normal line direction or a direction near thereof with respect to said sample surface; a second illumination optical system which is configured to illuminate said inspection area from a slant direction with respect to said sample surface; a detection optical system having a plurality of first detectors which are located, in front of, on the sides of, and behind said inspection area, respectively, with respect to the illumination direction of said second illumination optical system, and where the regular reflected light component, from said sample surface, by illumination light of said second illumination optical system, is not converged; and a signal processing system which is configured to inspect a defect, upon basis of signals obtained from said plurality of first detectors.Type: GrantFiled: May 24, 2011Date of Patent: May 20, 2014Assignee: Hitachi High-Technologies CorporaationInventors: Ichiro Ishimaru, Minori Noguchi, Ichiro Moriyama, Yoshikazu Tanabe, Yasuo Yatsugake, Yukio Kenbou, Kenji Watanabe, Hirofumi Tsuchiyama
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Publication number: 20120069329Abstract: A defect inspection apparatus including: a first illumination optical system which is configured to illuminate the inspection area on a sample surface from a normal line direction or a direction near thereof with respect to said sample surface; a second illumination optical system which is configured to illuminate said inspection area from a slant direction with respect to said sample surface; a detection optical system having a plurality of first detectors which are located, in front of, on the sides of, and behind said inspection area, respectively, with respect to the illumination direction of said second illumination optical system, and where the regular reflected light component, from said sample surface, by illumination light of said second illumination optical system, is not converged; and a signal processing system which is configured to inspect a defect, upon basis of signals obtained from said plurality of first detectors.Type: ApplicationFiled: May 24, 2011Publication date: March 22, 2012Inventors: Ichiro ISHIMARU, Minori Noguchi, Ichiro Moriyama, Yoshikazu Tanabe, Yasuo Yatsugake, Yukio Kenbou, Kenji Watanabe, Hirofumi Tsuchiyama
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Patent number: 7977234Abstract: A method of fabrication of a semiconductor integrated circuit device, including polishing the entire area of an edge of a wafer, for example, uses three polishing drums in which a polishing drum polishes the upper surface of the edge of the wafer, a polishing drum polishes the central portion of the edge of the wafer and a polishing drum polishes the lower surface of the edge of the wafer, thereby preventing occurrence of obstacles which cause defoliation of thin films on the edge of the wafer.Type: GrantFiled: May 18, 2010Date of Patent: July 12, 2011Assignee: Renesas Electronics CorporationInventors: Toshiyuki Arai, Ryousei Kawai, Hirofumi Tsuchiyama, Fumiyuki Kanai, Shinichi Nakabayashi
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Patent number: 7952085Abstract: The invention provides a surface inspection apparatus and a method for inspecting the surface of a sample that are capable of inspecting discriminatingly between the scratch of various configuration and the adhered foreign object that occur on the surface of a work target when the work target (for example, an insulating film on a semiconductor substrate) is subjected to polishing process such as CMP or grinding process in semiconductor manufacturing process or magnetic head manufacturing process.Type: GrantFiled: August 22, 2008Date of Patent: May 31, 2011Assignees: Hitachi, Ltd., Hitachi High-Technologies CorporationInventors: Ichiro Ishimaru, Minori Noguchi, Ichiro Moriyama, Yoshikazu Tanabe, Yasuo Yatsugake, Yukio Kenbou, Kenji Watanabe, Hirofumi Tsuchiyama
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Publication number: 20100227474Abstract: A method of fabrication of a semiconductor integrated circuit device, including polishing the entire area of an edge of a wafer, for example, uses three polishing drums in which a polishing drum polishes the upper surface of the edge of the wafer, a polishing drum polishes the central portion of the edge of the wafer and a polishing drum polishes the lower surface of the edge of the wafer, thereby preventing occurrence of obstacles which cause defoliation of thin films on the edge of the wafer.Type: ApplicationFiled: May 18, 2010Publication date: September 9, 2010Inventors: Toshiyuki ARAI, Ryousei Kawai, Hirofumi Tsuchiyama, Fumiyuki Kanai, Shinichi Nakabayashi
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Patent number: 7718526Abstract: A method of fabrication of a semiconductor integrated circuit device, including polishing the entire area of an edge of a wafer, for example, uses three polishing drums in which a polishing drum polishes the upper surface of the edge of the wafer, a polishing drum polishes the central portion of the edge of the wafer and a polishing drum polishes the lower surface of the edge of the wafer, thereby preventing occurrence of obstacles which cause defoliation of thin films on the edge of the wafer.Type: GrantFiled: July 16, 2007Date of Patent: May 18, 2010Assignee: Renesas Technology CorporationInventors: Toshiyuki Arai, Ryousei Kawai, Hirofumi Tsuchiyama, Fumiyuki Kanai, Shinichi Nakabayashi
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Publication number: 20090103078Abstract: An apparatus for detecting defects, including: a table unit which mounts a specimen to be inspected having a linearly moving stage and a rotationally moving stage; a first illumination optical unit which illuminates an inspection region of a surface of the specimen from a normal direction or in the vicinity of the normal direction while the specimen is rotating by the rotationally moving stage and moving in one direction by the linearly moving stage; a second illumination optical unit which illuminates the inspection region from a first elevation angle toward the inspection region while the specimen is rotating and moving; a first detection optical unit which detects light reflected from the inspection region by the illumination of the first illumination optical unit or the second illumination optical unit with plural detectors arranged in plural portions of a second elevation angle toward the inspection region; a second detection optical unit which detects light reflected from the inspection region by the ilType: ApplicationFiled: August 22, 2008Publication date: April 23, 2009Inventors: Ichiro ISHIMARU, Minori Noguchi, Ichiro Moriyama, Yoshikazu Tanabe, Yasuo Yatsugake, Yukio Kenbou, Kenji Watanabe, Hirofumi Tsuchiyama
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Patent number: 7417244Abstract: An apparatus for detecting defects, including: a first illumination optical unit which illuminates from a normal direction or in the vicinity of the normal direction; a second illumination optical unit which illuminates from a first elevation angle; a first detection optical unit which detects light reflected by the illumination of the first illumination optical unit or the second illumination optical unit with plural detectors; a second detection optical unit which detects light reflected by the illumination of the first illumination optical unit or the second illumination optical unit with plural detectors; wherein the plural detectors of the first detection optical unit and the plural detectors of the second detection optical unit are photomultipliers, and the signal processor processes the signals outputted from the photomultipliers and are adjusted to balance in sensitivities.Type: GrantFiled: January 25, 2007Date of Patent: August 26, 2008Assignees: Hitachi, Ltd., Hitachi High-Technologies CorporationInventors: Ichiro Ishimaru, Minori Noguchi, Ichiro Moriyama, Yoshikazu Tanabe, Yasuo Yatsugake, Yukio Kenbou, Kenji Watanabe, Hirofumi Tsuchiyama
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Publication number: 20070259522Abstract: A method of fabrication of a semiconductor integrated circuit device, including polishing the entire area of an edge of a wafer, for example, uses three polishing drums in which a polishing drum polishes the upper surface of the edge of the wafer, a polishing drum polishes the central portion of the edge of the wafer and a polishing drum polishes the lower surface of the edge of the wafer, thereby preventing occurrence of obstacles which cause defoliation of thin films on the edge of the wafer.Type: ApplicationFiled: July 16, 2007Publication date: November 8, 2007Inventors: Toshiyuki Arai, Ryousei Kawai, Hirofumi Tsuchiyama, Fumiyuki Kanai, Shinichi Nakabayashi
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Patent number: 7250365Abstract: A method of fabrication of a semiconductor integrated circuit device, including polishing the entire area of an edge of a wafer, for example, uses three polishing drums in which a polishing drum polishes the upper surface of the edge of the wafer, a polishing drum polishes the central portion of the edge of the wafer and a polishing drum polishes the lower surface of the edge of the wafer, thereby preventing occurrence of obstacles which cause defoliation of thin films on the edge of the wafer.Type: GrantFiled: June 28, 2005Date of Patent: July 31, 2007Assignee: Renesas Technology Corp.Inventors: Toshiyuki Arai, Ryousei Kawai, Hirofumi Tsuchiyama, Fumiyuki Kanai, Shinichi Nakabayashi
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Patent number: 7242016Abstract: A surface inspection apparatus and a method for inspecting the surface of a sample are capable of inspecting discriminatingly between scratches of various configuration and adhered foreign objects that occur on the surface of a work target when the work target (for example, an insulating film on a semiconductor substrate) is subjected to a polishing process such as CMP or a grinding process, in semiconductor manufacturing process or magnetic head manufacturing process. In the invention, the scratch and foreign object that occur on the polished or ground surface of the sample is epi-illuminated and slant-illuminated by use of approximately same light flux, the difference between the scattered light intensity from the shallow scratch and from the foreign object is applied to thereby discriminate between the shallow scratch and the foreign object, and the directionality of the scattered light is detected to discriminate between the linear scratch and the foreign object.Type: GrantFiled: April 13, 2005Date of Patent: July 10, 2007Assignees: Hitachi, Ltd., Hitachi High-Technologies CorporationInventors: Ichiro Ishimaru, Minori Noguchi, Ichiro Moriyama, Yoshikazu Tanabe, Yasuo Yatsugake, Yukio Kenbou, Kenji Watanabe, Hirofumi Tsuchiyama
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Patent number: 7234998Abstract: Setting a polishing rate and a polishing time in chemical mechanical polishing can be performed with high accuracy by considering a product wafer of an object to be polished, and an instrumental error between apparatuses to be used, etc. By using, as a calculating formula, a formula well approximating a portion of a curve representing a state of chemical mechanical polishing on a side showing a target polishing amount, the polishing rate and the polishing time can be set with high accuracy according to a state of chemical mechanical polishing for actually polishing a product wafer. In the calculating formula, a parameter “A” relating to a film property of a film of an object to be polished, a parameter “B” relating to a roughness state of a film surface, and a parameter “C” relating to an instrumental error differential between apparatuses of a chemical mechanical polishing apparatus are joined by operators.Type: GrantFiled: February 24, 2005Date of Patent: June 26, 2007Assignee: Trecenti Technologies, Inc.Inventors: Masahiro Aoyagi, Aki Nakajo, Hirofumi Tsuchiyama, Shinobu Nakamura
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Publication number: 20070121108Abstract: An apparatus for detecting defects, including: a first illumination optical unit which illuminates from a normal direction or in the vicinity of the normal direction; a second illumination optical unit which illuminates from a first elevation angle; a first detection optical unit which detects light reflected by the illumination of the first illumination optical unit or the second illumination optical unit with plural detectors; a second detection optical unit which detects light reflected by the illumination of the first illumination optical unit or the second illumination optical unit with plural detectors; wherein the plural detectors of the first detection optical unit and the plural detectors of the second detection optical unit are photomultipliers, and the signal processor processes the signals outputted from the photomultipliers and are adjusted to balance in sensitivities.Type: ApplicationFiled: January 25, 2007Publication date: May 31, 2007Inventors: Ichiro Ishimaru, Minori Noguchi, Ichiro Moriyama, Yoshikazu Tanabe, Yasuo Yatsugake, Yukio Kenbou, Kenji Watanabe, Hirofumi Tsuchiyama
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Patent number: 6979650Abstract: In order to reduce micro scratches which tend to occur during chemical-mechanical polishing, a polishing slurry is diluted with deionized water immediately before it is supplied in a gap between a polishing pad and the surface of a wafer to be polished. By diluting the polishing slurry with deionized water to increase its volume, the concentration of coagulated particles contained in the polishing slurry can be lowered. For a mixture ratio of the polishing slurry and deionized water, about 1 (polishing slurry): 1–1.2 (deionized water) is used, and the concentration of silica contained in the diluted polishing slurry is adjusted to about 3–9 weight %, preferably about 4–8 weight %, and more preferably about 8 weight %.Type: GrantFiled: July 6, 2004Date of Patent: December 27, 2005Assignee: Renesas Technology Corp.Inventors: Shinichi Nakabayshi, Hisahiko Abe, Hirofumi Tsuchiyama, Masaki Hiyama, Takashi Nishiguchi
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Patent number: 6979649Abstract: A method of fabrication of a semiconductor integrated circuit device, including polishing the entire area of an edge of a wafer, for example, uses three polishing drums in which a polishing drum polishes the upper surface of the edge of the water, a polishing drum polishes the central portion of the edge of the wafer and a polishing drum polishes the lower surface of the edges of the wafer, thereby preventing occurrence of obstacles which cause defoliation of thin films on the edge of the wafer.Type: GrantFiled: March 1, 2002Date of Patent: December 27, 2005Assignee: Renesas Technology Corp.Inventors: Toshiyuki Arai, Ryousei Kawai, Hirofumi Tsuchiyama, Fumiyuki Kanai, Shinichi Nakabayashi
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Publication number: 20050250331Abstract: A method of fabrication of a semiconductor integrated circuit device, including polishing the entire area of an edge of a wafer, for example, uses three polishing drums in which a polishing drum polishes the upper surface of the edge of the wafer, a polishing drum polishes the central portion of the edge of the wafer and a polishing drum polishes the lower surface of the edge of the wafer, thereby preventing occurrence of obstacles which cause defoliation of thin films on the edge of the wafer.Type: ApplicationFiled: June 28, 2005Publication date: November 10, 2005Inventors: Toshiyuki Arai, Ryousei Kawai, Hirofumi Tsuchiyama, Fumiyuki Kanai, Shinichi Nakabayashi
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Publication number: 20050197046Abstract: Setting a polishing rate and a polishing time in chemical mechanical polishing can be performed with high accuracy by considering a product wafer of an object to be polished, and an instrumental error between apparatuses to be used, etc. By using, as a calculating formula, a formula well approximating a portion of a curve representing a state of chemical mechanical polishing on a side showing a target polishing amount, the polishing rate and the polishing time can be set with high accuracy according to a state of chemical mechanical polishing for actually polishing a product wafer. In the calculating formula, a parameter “A” relating to a film property of a film of an object to be polished, a parameter “B” relating to a roughness state of a film surface, and a parameter “C” relating to an instrumental error differential between apparatuses of a chemical mechanical polishing apparatus are joined by operators.Type: ApplicationFiled: February 24, 2005Publication date: September 8, 2005Inventors: Masahiro Aoyagi, Aki Nakajo, Hirofumi Tsuchiyama, Shinobu Nakamura
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Publication number: 20050185172Abstract: A surface inspection apparatus and a method for inspecting the surface of a sample are capable of inspecting discriminatingly between scratches of various configuration and adhered foreign objects that occur on the surface of a work target when the work target (for example, an insulating film on a semiconductor substrate) is subjected to a polishing process such as CMP or a grinding process, in semiconductor manufacturing process or magnetic head manufacturing process. In the invention, the scratch and foreign object that occur on the polished or ground surface of the sample is epi-illuminated and slant-illuminated by use of approximately same light flux, the difference between the scattered light intensity from the shallow scratch and from the foreign object is applied to thereby discriminate between the shallow scratch and the foreign object, and the directionality of the scattered light is detected to discriminate between the linear scratch and the foreign object.Type: ApplicationFiled: April 13, 2005Publication date: August 25, 2005Inventors: Ichiro Ishimaru, Minori Noguchi, Ichiro Moriyama, Yoshikazu Tanabe, Yasuo Yatsugake, Yukio Kenbou, Kenji Watanabe, Hirofumi Tsuchiyama