Abstract: A display device is provided that includes a plurality of sub-pixels. Each sub-pixel includes a light-emitting unit having an illumination area, wherein the illumination area is divided into a plurality of illumination regions, and each illumination region is configured to be illuminated independently. The light-emitting unit emits a light, and a gray level of the light is determined according to the total area of the illumination regions being illuminated.

Abstract: A display device includes a plurality of pixels. One of the pixels includes a light emitting diode and a driving circuit coupled to the light emitting diode. A display frame period includes at least two emission periods. The light emitting diode emits light according to a data signal including a gray level in each of the at least two emission periods.

Abstract: A light-emitting device (LED) includes a primary driving circuit and a pixel. The primary driving circuit receives a system high voltage, a data signal, and a scan signal from a scan line, wherein the primary driving circuit has an output terminal. The pixel includes a plurality of light-emitting sub-pixel circuits. Each of the light-emitting sub-pixel is coupled to the output terminal of the primary driving circuit. Wherein, a frame period includes multiple equal fields, the light-emitting sub-pixel circuits are respectively corresponding to the fields and are activated according to a sequence as assigned. The light-emitting device display includes a plurality of light-emitting sub-pixel circuits are activated in raw, in column or both according to a sequence as assigned.

Abstract: A pixel circuit for illuminating an LED unit with a level of brightness is provided, which includes a latch circuit, a pass switch, a PWM circuit, and a current source. The latch circuit latches control data according to a latch signal to generate a control signal. The pass switch provides the control data from a data signal to the latch circuit according to a scan signal. The PWM circuit generates a PWM signal according to the control signal and an enable signal. The current source supplies a constant current flowing through the LED unit according to the PWM signal.

Abstract: A light-emitting device (LED) includes a primary driving circuit and a pixel. The primary driving circuit receives a system high voltage, a data signal, and a scan signal from a scan line, wherein the primary driving circuit has an output terminal. The pixel includes a plurality of light-emitting sub-pixel circuits. Each of the light-emitting sub-pixel is coupled to the output terminal of the primary driving circuit. Wherein, a frame period includes multiple equal fields, the light-emitting sub-pixel circuits are respectively corresponding to the fields and are activated according to a sequence as assigned. The light-emitting device display includes a plurality of light-emitting sub-pixel circuits are activated in raw, in column or both according to a sequence as assigned.

Abstract: A display panel including a first current source and a first pixel unit is provided. The first pixel unit includes a first switch and a first light-emitting diode. The first switch is coupled to the first current source and receives a first scan signal. When the first scan signal is enabled, the first switch is turned on and receives a first current provided by the first current source. The first light-emitting diode is coupled to the first switch. When the first switch is turned on, the first current passes through the first light-emitting diode to turn on the first light-emitting diode.

Abstract: A display panel comprises an open area, a data driver, a first de-multiplexer having an input terminal and a plurality of output terminals, a second de-multiplexer having a input terminal and a plurality of output terminals, a first data line, a second data line, and a third data line. The first de-multiplexer and the second de-multiplexer are located at opposite side of the open area, the first de-multiplexer and the second de-multiplexer are connected to the data driver through a first data output terminal of the data driver, and the first de-multiplexer is located between the data driver and the open area. The first data line is connected to one of the output terminals of the first de-multiplexer, the second data line is connected to one of the output terminals of the second de-multiplexer, and the third data line is connected to the input terminal of the second de-multiplexer.

Abstract: A display panel comprises a display area, a plurality of scan lines and data lines, a data driving circuit and a demultiplexing unit. The scan lines and the data lines cross each other within the display area. At least two of the data lines have different capacitances. The data driving circuit outputs a plurality of control signal and a data signal. The demultiplexing unit includes a plurality of thin-film transistors coupled with the data driving circuit and the data lines. The thin-film transistors receive the data signal and transmit the data signal to the correspondingly coupled data lines through channel layers of the thin-film transistors according to the control signals. The channel layers of at least two of the thin-film transistors coupled with the at least two data lines have different widths.

Abstract: A display device comprises a display panel. The display panel comprises a plurality of gate lines, a plurality of data lines, a plurality of sub-pixels, a gate driver connected to the gate lines, and a data driver connected to the data lines. The data driver comprises a de-multiplexer controller for outputting a plurality of control signals to a plurality of control lines, a data process portion for outputting a plurality of data signals to a plurality of signal lines, and a first de-multiplexer comprising a plurality of switches connected to the de-multiplexer controller through the control lines, the data process portion through at least one of the signal lines, and the sub-pixels through the data lines. Wherein the switches of the first de-multiplexer keep turned on within a first horizontal period.

Abstract: A display panel comprises a display area, a plurality of scan lines and data lines, a data driving circuit and a demultiplexing unit. The scan lines and the data lines cross each other within the display area. At least two of the data lines have different capacitances. The data driving circuit outputs a plurality of control signal and a data signal. The demultiplexing unit includes a plurality of thin-film transistors coupled with the data driving circuit and the data lines. The thin-film transistors receive the data signal and transmit the data signal to the correspondingly coupled data lines through channel layers of the thin-film transistors according to the control signals. The channel layers of at least two of the thin-film transistors coupled with the at least two data lines have different widths.

Abstract: A display panel comprises a display area, a plurality of scan lines and data lines, a data driving circuit and a demultiplexing unit. The scan lines and the data lines cross each other within the display area. At least two of the data lines have different capacitances. The data driving circuit outputs a plurality of control signal and a data signal. The demultiplexing unit includes a plurality of thin-film transistors coupled with the data driving circuit and the data lines. The thin-film transistors receive the data signal and transmit the data signal to the correspondingly coupled data lines through channel layers of the thin-film transistors according to the control signals. The channel layers of at least two of the thin-film transistors coupled with the at least two data lines have different widths.

Abstract: A display panel comprises a display area, a plurality of scan lines and data lines, a data driving circuit and a demultiplexing unit. The scan lines and the data lines cross each other within the display area. At least two of the data lines have different capacitances. The data driving circuit outputs a plurality of control signal and a data signal. The demultiplexing unit includes a plurality of thin-film transistors coupled with the data driving circuit and the data lines. The thin-film transistors receive the data signal and transmit the data signal to the correspondingly coupled data lines through channel layers of the thin-film transistors according to the control signals. The channel layers of at least two of the thin-film transistors coupled with the at least two data lines have different widths.

Abstract: A display panel is provided and includes gate lines, source lines, and pixel units. Each gate line extends in a first direction, while each source line extends in a second direction interlacing with the first direction. The pixel units are arranged to form a display array. Each pixel unit is coupled to three sequentially disposed gate lines and three sequentially disposed source lines. Each pixel unit includes pixels. For each pixel unit, the pixels between any set of the two adjacent gate lines are coupled to different gate lines and different source lines. For each pixel unit, the pixels between one set of the two adjacent source lines are coupled to the same gate line and different source lines, and the pixels between the other set of the two adjacent source lines are coupled to different gate lines and different source lines.

Abstract: A display panel is provided and includes gate lines, source lines, and pixel units. Each gate line extends in a first direction, while each source line extends in a second direction interlacing with the first direction. The pixel units are arranged to form a display array. Each pixel unit is coupled to three sequentially disposed gate lines and three sequentially disposed source lines. Each pixel unit includes pixels. For each pixel unit, the pixels between any set of the two adjacent gate lines are coupled to different gate lines and different source lines. For each pixel unit, the pixels between one set of the two adjacent source lines are coupled to the same gate line and different source lines, and the pixels between the other set of the two adjacent source lines are coupled to different gate lines and different source lines.

Abstract: A display device capable of preventing display noise from being induced in the first frame period after a power source is input thereto. The display device includes pixels arranged in a matrix formed by rows and columns. Each pixel includes a pixel electrode, a display element, a storage capacitor coupled to the display element through the pixel electrode, and a switch element. The display device further includes a capacitive storage (CS) driving device which is synchronized with the scan line driving device to switch a potential of each electrode between two values one row by one row. Each electrode is disposed opposite to corresponding pixel electrode through a storage capacitor and is coupled to a corresponding CS line. After a power source is input and before the first scanning operation is performed, the CS driving device sets a potential of each capacitive storage line to one of the two values.

Abstract: A voltage supplying device (1) comprising a video line (LV1), a video line (LVn), a source line (LS1) of a source line group (GS1) supplied with a gray scale voltage through the video line (LV1), a source line (LSn) of a source line group (GS1) supplied with a gray scale voltage through the video line (LVn), a source line (LS1) of a source line group (GS2) supplied with a voltage through the video line (LV1), and a controlling means for continuing to supply the source line (LSn) of the source line group (GS1) during a transition from a state in which the source line (LS1) of a source line group (GS1) is supplied with a voltage to a state in which the source line (LSn) of a source line group (GS1) is supplied with a voltage.

Abstract: An active matrix display capable of compensating leaking current while maintaining the aperture rate is provided. The active matrix display device has a plurality of pixels arranged as a matrix, and each of the pixels includes a liquid crystal display element; a driving control switch for controlling the driving of the liquid crystal display element; and a storage capacitor for storing image data provided to the liquid crystal display element via the driving control switch. The display device is an active matrix display device comprising voltage-compensating means for applying a specified voltage to one end of the storage capacitor opposite to another end coupled to the liquid crystal display element in a maintaining period.

Abstract: A voltage supplying device (1) comprising a video line (LV1), a video line (LVn), a source line (LS1) of a source line group (GS1) supplied with a gray scale voltage through the video line (LV1), a source line (LSn) of a source line group (GS1) supplied with a gray scale voltage through the video line (LVn), a source line (LS1) of a source line group (GS2) supplied with a voltage through the video line (LV1), and a controlling means for continuing to supply the source line (LSn) of the source line group (GS1) during a transition from a state in which the source line (LS1) of a source line group (GS1) is supplied with a voltage to a state in which the source line (LSn) of a source line group (GS1) is supplied with a voltage.

Abstract: A display device having a control circuit for changing a time period of applying a signal voltage to each of the signal lines and a scanning voltage to each of the scanning lines within one vertical scanning period (T). The control circuit controls each of horizontal scanning periods (t1 to tm) in such a manner that the period is gradually increased from the scanning line located close to a vertical driving circuit to the scanning line located remote from the vertical driving circuit. In this way, when writing a signal voltage to a pixel via the signal lines, the target potential is reached at each pixel within the time period of applying the signal voltage.

Abstract: A display device comprises a control circuit (50) for changing a time period of applying a signal voltage to each of the signal lines (42-1 to 42-n) and a scanning voltage to each of the scanning lines (41-1 to 41-m) within one vertical scanning period (T). The control circuit (50) controls each of horizontal scanning periods (t1 to tm) in such a manner that the period is gradually increased from the scanning line (41-m) located close to a vertical driving circuit (30) to the scanning line (41-1) located remote from the vertical driving circuit (30). In this way, when writing a signal voltage to a pixel via the signal lines, at each pixel the target potential is reached within the time period of applying the signal voltage.