Patents by Inventor Hirohiko Kobayashi
Hirohiko Kobayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12102926Abstract: A game apparatus provides gameplay concerning development of characters evolving through multiple evolution stages. Type information uniquely identifying the type and the evolution state of each character capable of being developed in the game apparatus is defined. The game apparatus includes a first acquisition unit acquiring information about a state of activity of a wearer; an update unit updating a first parameter and a second parameter concerning a developing character based on the information about the state of activity and the type information about the developing character; a display control unit causing a display unit to display the developing character in a display mode corresponding to the first and second parameters; an accumulation unit accumulating an evolution score concerning development of the developing character based on the first and second parameters; and a determination unit determining a target character of the developing character based on the evolution score.Type: GrantFiled: November 29, 2021Date of Patent: October 1, 2024Assignee: BANDAI CO., LTD.Inventors: Hirohiko Sekido, Shinichi Tachibana, Fumiya Kobayashi
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Patent number: 12102927Abstract: A game system includes a game apparatus providing gameplay concerning development of characters evolving through multiple evolution stages and an information communication terminal with the game apparatus, which causes a display unit to display an evolution flow indicating a group of characters. Type information uniquely identifying the type and the evolution state of each character is defined. The evolution flow is displayed in an aspect in which at least part of the characters is unidentifiable in an initial state and is configured so that the number of kinds of the characters in each evolution stage is identifiable. The information communication terminal includes a first acquisition unit acquiring the type information and a display control unit that changes the evolution flow including the character having the acquired type information from an unidentifiable aspect to an identifiable aspect to cause the display unit to display the evolution flow.Type: GrantFiled: November 29, 2021Date of Patent: October 1, 2024Assignee: BANDAI CO., LTD.Inventors: Hirohiko Sekido, Yuta Shimano, Fumiya Kobayashi
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Patent number: 10128633Abstract: A surface emitting semiconductor laser includes a post disposed on a substrate, the post including an active layer and a distributed Bragg reflector; a first insulating layer disposed on side and top surfaces of the post and on the substrate, the first insulating layer having an opening on the top surface of the post; an electrode disposed in the opening of the first insulating layer; an electric conductor including a pad electrode on the first insulating layer, the electric conductor extending on the first insulating layer to the electrode; and a second insulating layer disposed on the first insulating layer, the electrode, and the electric conductor so as to cover the electrode in the opening of the first insulating layer, the second insulating layer having an opening on the pad electrode, the opening of the second insulating layer having an edge on a top surface of the pad electrode.Type: GrantFiled: February 5, 2018Date of Patent: November 13, 2018Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Yuji Koyama, Masaki Yanagisawa, Yukihiro Tsuji, Hirohiko Kobayashi, Hiroyuki Yoshinaga
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Publication number: 20180269655Abstract: A surface emitting semiconductor laser includes a post disposed on a substrate, the post including an active layer and a distributed Bragg reflector; a first insulating layer disposed on side and top surfaces of the post and on the substrate, the first insulating layer having an opening on the top surface of the post; an electrode disposed in the opening of the first insulating layer; an electric conductor including a pad electrode on the first insulating layer, the electric conductor extending on the first insulating layer to the electrode; and a second insulating layer disposed on the first insulating layer, the electrode, and the electric conductor so as to cover the electrode in the opening of the first insulating layer, the second insulating layer having an opening on the pad electrode, the opening of the second insulating layer having an edge on a top surface of the pad electrode.Type: ApplicationFiled: February 5, 2018Publication date: September 20, 2018Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Yuji Koyama, Masaki Yanagisawa, Yukihiro Tsuji, Hirohiko Kobayashi, Hiroyuki Yoshinaga
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Patent number: 10039904Abstract: A guide wire includes a core shaft, a coil body which covers the core shaft, and a coating film which covers the coil body. Portions of the coating film are disposed between adjacent coils of coil body, and gaps are formed between the coils and the portions of the coating film disposed between the adjacent coils. Due to this configuration, the coating the film can be easily bent, and thus the coil body may easily bend. As a result, it is possible to ensure lubricity of guide wire within the blood vessel while also enabling the guide wire to follow the shape of the blood vessel in which it is inserted.Type: GrantFiled: June 25, 2014Date of Patent: August 7, 2018Assignee: ASAHI INTECC CO., LTD.Inventors: Keigo Takada, Hirohiko Kobayashi
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Patent number: 9638980Abstract: A modulator including: a Mach-Zehnder modulator that includes an optical waveguide disposed on a substrate, the optical waveguide including an electrode thereon; a resin layer disposed on the substrate, the resin layer embedding the optical waveguide, the resin layer having a groove arranged besides the optical waveguide; a termination resistor disposed on the substrate in the groove of the resin layer; and a first wiring disposed on the resin layer, the first wiring being connected to the termination resistor and the electrode of the optical waveguide.Type: GrantFiled: July 21, 2015Date of Patent: May 2, 2017Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Hideki Yagi, Hirohiko Kobayashi, Naoya Kono, Takamitsu Kitamura
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Patent number: 9563100Abstract: An optical semiconductor device including: a substrate having a principal surface; first and second optical waveguides disposed on the principal surface of the substrate, the first and second optical waveguides extending in a first direction, the second optical waveguide being arranged adjacent to the first optical waveguide in a second direction intersecting with the first direction; first and second signal electrodes disposed on the first and second optical waveguides; a resistor disposed on the principal surface, the resistor being arranged between the first optical waveguide and the second optical waveguide, the resistor being electrically connected to the first signal electrode and the second signal electrode; a resin layer disposed on the principal surface, top surfaces of the first and second signal electrodes, and the resistor; and a capacitor disposed on the resin layer, the capacitor being electrically connected to the resistor through an opening of the resin layer.Type: GrantFiled: July 23, 2015Date of Patent: February 7, 2017Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Ryuji Masuyama, Naoya Kono, Daisuke Kimura, Hirohiko Kobayashi, Takamitsu Kitamura, Hideki Yagi
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Patent number: 9523871Abstract: A semiconductor optical modulator includes a substrate having a principal surface; a waveguide disposed on the principal surface of the substrate, the waveguide extending in a first direction; a first electrode disposed on the waveguide, the first electrode being in contact with an upper surface of the waveguide; a first wiring connected to the first electrode, the first wiring extending in a second direction intersecting the first direction; a build-up portion connected to the first wiring; a second wiring connected to the build-up portion, the second wiring extending in a plane parallel to the principal surface of the substrate; and a resin layer disposed on the substrate, the resin layer embedding the first wiring and the build-up portion. The build-up portion extends along a third direction, the third direction intersecting perpendicularly to the principal surface of the substrate. The second wiring is disposed on the resin layer.Type: GrantFiled: July 10, 2015Date of Patent: December 20, 2016Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Takamitsu Kitamura, Hideki Yagi, Daisuke Kimura, Hirohiko Kobayashi, Masataka Watanabe
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Patent number: 9280004Abstract: A method for manufacturing a semiconductor modulator includes the steps of preparing a substrate having a main surface including first and second areas; forming a stacked semiconductor layer on the main surface; forming an optical waveguide mesa by etching the stacked semiconductor layer using a mask, the optical waveguide mesa including an optical modulation portion; applying a resin on a top surface and a side surface of the optical waveguide mesa and on the substrate; forming a first opening in the resin on the second area of the substrate; forming an underlayer structure on the second area of the substrate in contact with the substrate; and forming a pad electrode on the underlayer structure in contact with the underlayer structure through the first opening of the resin. The underlayer structure includes an insulating layer made of a dielectric material.Type: GrantFiled: March 28, 2014Date of Patent: March 8, 2016Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Hideki Yagi, Takamitsu Kitamura, Hirohiko Kobayashi, Yoshihiro Yoneda
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Publication number: 20160026064Abstract: An optical semiconductor device including: a substrate having a principal surface; a first and a second optical waveguides disposed on the principal surface of the substrate, the first and second optical waveguides extending in a first direction, the second optical waveguide being arranged adjacent to the first optical waveguide in a second direction intersecting with the first direction; a first and a second signal electrodes disposed on the first and second optical waveguides; a resistor disposed on the principal surface, the resistor being arranged between the first optical waveguide and the second optical waveguide, the resistor being electrically connected to the first signal electrode and the second signal electrode; a resin layer disposed on the principal surface, top surfaces of the first and second signal electrodes, and the resistor; and a capacitor disposed on the resin layer, the capacitor being electrically connected to the resistor through an opening of the resin layer.Type: ApplicationFiled: July 23, 2015Publication date: January 28, 2016Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Ryuji MASUYAMA, Naoya KONO, Daisuke KIMURA, Hirohiko KOBAYASHI, Takamitsu KITAMURA, Hideki YAGI
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Publication number: 20160026063Abstract: A modulator including: a Mach-Zehnder modulator that includes an optical waveguide disposed on a substrate, the optical waveguide including an electrode thereon; a resin layer disposed on the substrate, the resin layer embedding the optical waveguide, the resin layer having a groove arranged besides the optical waveguide; a termination resistor disposed on the substrate in the groove of the resin layer; and a first wiring disposed on the resin layer, the first wiring being connected to the termination resistor and the electrode of the optical waveguide.Type: ApplicationFiled: July 21, 2015Publication date: January 28, 2016Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Hideki YAGI, Hirohiko Kobayashi, Naoya Kono, Takamitsu Kitamura
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Publication number: 20160011439Abstract: A semiconductor optical modulator includes a substrate having a principal surface; a waveguide disposed on the principal surface of the substrate, the waveguide extending in a first direction; a first electrode disposed on the waveguide, the first electrode being in contact with an upper surface of the waveguide; a first wiring connected to the first electrode, the first wiring extending in a second direction intersecting the first direction; a build-up portion connected to the first wiring; a second wiring connected to the build-up portion, the second wiring extending in a plane parallel to the principal surface of the substrate; and a resin layer disposed on the substrate, the resin layer embedding the first wiring and the build-up portion. The build-up portion extends along a third direction, the third direction intersecting perpendicularly to the principal surface of the substrate. The second wiring is disposed on the resin layer.Type: ApplicationFiled: July 10, 2015Publication date: January 14, 2016Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Takamitsu KITAMURA, Hideki YAGI, Daisuke KIMURA, Hirohiko KOBAYASHI, Masataka WATANABE
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Patent number: 9223088Abstract: A method for manufacturing a semiconductor optical device includes the steps of forming a semiconductor mesa by etching a stacked semiconductor layer, the semiconductor mesa being defined by two grooves, one on each side of the semiconductor mesa; forming a first insulating film on a side surface and a top surface of the semiconductor mesa; forming a resin film on the first insulating film, the resin film filling the grooves; etching the resin film on the semiconductor mesa to form a first opening in the resin film, the first insulating film being exposed through the first opening; etching the first insulating film exposed through the first opening to expose the top surface of the semiconductor mesa; depositing an ohmic metal on the top surface of the semiconductor mesa; and depositing a second insulating film on the ohmic metal and a surface of the resin film.Type: GrantFiled: May 1, 2014Date of Patent: December 29, 2015Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Hirohiko Kobayashi, Yoshihiro Yoneda, Hideki Yagi
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Publication number: 20150277046Abstract: A method for manufacturing a semiconductor optical device includes the steps of forming a semiconductor mesa by etching a stacked semiconductor layer, the semiconductor mesa being defined by two grooves, one on each side of the semiconductor mesa; forming a first insulating film on a side surface and a top surface of the semiconductor mesa; forming a resin film on the first insulating film, the resin film filling the grooves; etching the resin film on the semiconductor mesa to form a first opening in the resin film, the first insulating film being exposed through the first opening; etching the first insulating film exposed through the first opening to expose the top surface of the semiconductor mesa; depositing an ohmic metal on the top surface of the semiconductor mesa; and depositing a second insulating film on the ohmic metal and a surface of the resin film.Type: ApplicationFiled: May 1, 2014Publication date: October 1, 2015Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Hirohiko KOBAYASHI, Yoshihiro YONEDA, Hideki YAGI
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Publication number: 20150088036Abstract: A guide wire includes a core shaft, a coil body which covers the core shaft, and a coating film which covers the coil body. Portions of the coating film are disposed between adjacent coils of coil body, and gaps are formed between the coils and the portions of the coating film disposed between the adjacent coils. Due to this configuration, the coating the film can be easily bent, and thus the coil body may easily bend. As a result, it is possible to ensure lubricity of guide wire within the blood vessel while also enabling the guide wire to follow the shape of the blood vessel in which it is inserted.Type: ApplicationFiled: June 25, 2014Publication date: March 26, 2015Inventors: Keigo TAKADA, Hirohiko KOBAYASHI
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Patent number: 8964809Abstract: A semiconductor optical integrated device includes a substrate having a main surface with a first and second regions arranged along a waveguiding direction; a gain region including a first cladding layer, an active layer, and a second cladding layer arranged on the first region of the main surface; and a wavelength control region including a third cladding layer, an optical waveguide layer, and a fourth cladding layer arranged on the second region of the main surface and including a heater arranged along the optical waveguide layer. The substrate includes a through hole extending from a back surface of the substrate in the thickness direction and reaching the first region. A metal member is arranged in the through hole. The metal member extends from the back surface of the substrate in the thickness direction and is in contact with the first cladding layer.Type: GrantFiled: August 29, 2012Date of Patent: February 24, 2015Assignee: Sumitomo Electric Industies, LtdInventors: Yoshihiro Yoneda, Masaki Yanagisawa, Kenji Koyama, Hirohiko Kobayashi, Kenji Hiratsuka
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Patent number: 8900903Abstract: A method for producing an optical semiconductor device includes the steps of forming a semiconductor structure; forming a mask on the semiconductor structure; etching the semiconductor structure with the mask to form first and second stripe-shaped grooves and a mesa portion; forming a protective film on a top surface and side surfaces of the mesa portion; forming a resin portion on the protective film; etching the resin portion and the protective film formed on the top surface; forming an upper electrode on the top surface; and forming an electrical interconnection on the resin portion. The resin portion has an inclined surface region that rises from a first point above the mesa portion toward a second point above the first stripe-shaped groove. The step of etching the resin portion and the protective film includes the substeps of etching the resin portion and simultaneously etching the resin portion and the protective film.Type: GrantFiled: March 7, 2013Date of Patent: December 2, 2014Assignee: Sumitomo Electric Industries, Ltd.Inventors: Yoshihiro Yoneda, Hirohiko Kobayashi, Ryuji Masuyama
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Patent number: 8873598Abstract: A waveguide-type optical semiconductor device includes a substrate with a main surface; a structure including a stacked semiconductor layer including a core layer provided on the main surface of the substrate, a stripe-shaped mesa portion protruding in a first direction orthogonal to the main surface and extending in a second direction parallel to the main surface, and a pair of stripe-shaped grooves defining the stripe-shaped mesa portion and extending in the second direction; a protrusion provided in the pair of stripe-shaped grooves, the protrusion protruding from the structure in the first direction; and a resin portion covering a side face of the protrusion, the resin portion being buried in the stripe-shaped grooves. The relative position of the protrusion with respect to the structure is fixed. In addition, the side face of the protrusion intersects with the second direction when viewed from the first direction.Type: GrantFiled: January 15, 2013Date of Patent: October 28, 2014Assignee: Sumitomo Electric Industries, Ltd.Inventors: Yoshihiro Yoneda, Hirohiko Kobayashi, Ryuji Masuyama
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Publication number: 20140294335Abstract: A method for manufacturing a semiconductor modulator includes the steps of preparing a substrate having a main surface including first and second areas; forming a stacked semiconductor layer on the main surface; forming an optical waveguide mesa by etching the stacked semiconductor layer using a mask, the optical waveguide mesa including an optical modulation portion; applying a resin on a top surface and a side surface of the optical waveguide mesa and on the substrate; forming a first opening in the resin on the second area of the substrate; forming an underlayer structure on the second area of the substrate in contact with the substrate; and forming a pad electrode on the underlayer structure in contact with the underlayer structure through the first opening of the resin. The underlayer structure includes an insulating layer made of a dielectric material.Type: ApplicationFiled: March 28, 2014Publication date: October 2, 2014Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Hideki YAGI, Takamitsu KITAMURA, Hirohiko KOBAYASHI, Yoshihiro YONEDA
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Patent number: 8637329Abstract: A method for producing a semiconductor optical integrated device includes the steps of forming a substrate product including first and second stacked semiconductor layer portions; forming a first mask on the first and second stacked semiconductor layer portions, the first mask including a stripe-shaped first pattern region and a second pattern region, the second pattern region including a first end edge; forming a stripe-shaped mesa structure; removing the second pattern region of the first mask; forming a second mask on the second stacked semiconductor layer portion; and selectively growing a buried semiconductor layer with the first and second masks. The second mask includes a second end edge separated from the first end edge of the first mask, the second end edge being located on the side of the second stacked semiconductor layer portion in the predetermined direction with respect to the first end edge of the first mask.Type: GrantFiled: June 29, 2012Date of Patent: January 28, 2014Assignee: Sumitomo Electric Industries LtdInventors: Yoshihiro Yoneda, Hirohiko Kobayashi, Kenji Koyama, Masaki Yanagisawa, Kenji Hiratsuka