Patents by Inventor Hirohiko SADAMATSU

Hirohiko SADAMATSU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160099721
    Abstract: An analog-digital conversion system includes an analog-digital converter; and a preamplifier circuit which is provided in the previous stage of the analog-digital converter and differentially amplifies an input analog signal. In the preamplifier circuit, an offset voltage and/or a noise occurs and/or is mixed. The preamplifier circuit outputs two types of analog amplified differential signals where a phase is inverted only with respect to the offset voltage and/or the noise. The analog-digital converter has an averaging circuit which averages the two types of analog amplified differential signals for each clock cycle of sampling preceding an analog-digital conversion and outputs a digital signal based on the differential signal averaged by the averaging circuit.
    Type: Application
    Filed: October 1, 2014
    Publication date: April 7, 2016
    Inventors: Tetsuro OKURA, Yusaku Ito, Hirohiko Sadamatsu
  • Patent number: 9306589
    Abstract: An analog-digital conversion system includes an analog-digital converter; and a preamplifier circuit which is provided in the previous stage of the analog-digital converter and differentially amplifies an input analog signal. In the preamplifier circuit, an offset voltage and/or a noise occurs and/or is mixed. The preamplifier circuit outputs two types of analog amplified differential signals where a phase is inverted only with respect to the offset voltage and/or the noise. The analog-digital converter has an averaging circuit which averages the two types of analog amplified differential signals for each clock cycle of sampling preceding an analog-digital conversion and outputs a digital signal based on the differential signal averaged by the averaging circuit.
    Type: Grant
    Filed: October 1, 2014
    Date of Patent: April 5, 2016
    Assignee: Cypress Semicondcutor Corporation
    Inventors: Tetsuro Okura, Yusaku Ito, Hirohiko Sadamatsu
  • Publication number: 20100309594
    Abstract: An integrated circuit device includes a first power supply domain and a second power supply domain, wherein the first power supply domain includes a first power supply line and a second power supply line, an internal circuit between the first power supply line and the second power supply line, a first clamp circuit that electrically couples between the first power supply line and the second power supply line when a certain potential difference is generated between the first power supply line and the second power supply line, and at least one of a junction element that is between the first clamp circuit and the first power supply line and a junction element that is between the first clamp circuit and the second power supply line, the junction element allowing current to flow when the first clamp circuit becomes electrically conductive.
    Type: Application
    Filed: June 3, 2010
    Publication date: December 9, 2010
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Hirohiko SADAMATSU, Tetsuji Funaki, Norio Nagase