Patents by Inventor Hirohisa Fujita

Hirohisa Fujita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10861703
    Abstract: To provide dummy openings having at least one of arrangement and shape determined depending on the shape of a non-effective region.
    Type: Grant
    Filed: August 2, 2018
    Date of Patent: December 8, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Hirohisa Fujita, Kenji Fujii, Satoshi Ibe, Makoto Watanabe, Shuhei Oya, Yusuke Hashimoto
  • Patent number: 10442201
    Abstract: A method for manufacturing a liquid ejection head includes: a step of preparing a substrate having a first surface on which energy generation elements and a first layer are provided; and a step of forming a supply port by etching the substrate with an etching liquid or an etching gas from a second surface which is a surface opposite to the first surface so as to enable the etching liquid or the etching gas to reach the first layer, and the first layer is divided by a region which is located between a portion of the first layer covering the energy generation elements and a portion of the first layer to which the etching liquid or the etching gas is reached.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: October 15, 2019
    Assignee: Canon Kabushiki Kaisha
    Inventors: Satoshi Ibe, Kenji Fujii, Yusuke Hashimoto, Shuhei Oya, Hirohisa Fujita
  • Publication number: 20190051533
    Abstract: To provide dummy openings having at least one of arrangement and shape determined depending on the shape of a non-effective region.
    Type: Application
    Filed: August 2, 2018
    Publication date: February 14, 2019
    Inventors: Hirohisa Fujita, Kenji Fujii, Satoshi Ibe, Makoto Watanabe, Shuhei Oya, Yusuke Hashimoto
  • Publication number: 20180326723
    Abstract: The present invention provides a liquid ejecting head in which a chip crack is unlikely to occur. To achieve this, a liquid ejecting head includes an element substrate having energy generating elements arranged on the front face of the element substrate in its longitudinal direction and a channel member having ejection ports formed to correspond to the energy generating elements, respectively. In the element substrate, a supply port for supplying liquid is formed so as to pierce through from a back face to a front face of the element substrate, and inside the supply port, a beam is formed at a position closer to an end of the supply port rather than a center thereof in its longitudinal direction to connect facing inner walls of the supply port in its lateral direction.
    Type: Application
    Filed: May 1, 2018
    Publication date: November 15, 2018
    Inventors: Takanobu Manabe, Kenji Fujii, Hirohisa Fujita, Keisuke Kishimoto, Yoshinori Tagawa, Hideo Saikawa, Yasushi Iijima, Kenji Yabe, Kyosuke Toda, Yosuke Takagi, Hiroyuki Murayama
  • Publication number: 20180319165
    Abstract: A method for manufacturing a liquid ejection head includes: a step of preparing a substrate having a first surface on which energy generation elements and a first layer are provided; and a step of forming a supply port by etching the substrate with an etching liquid or an etching gas from a second surface which is a surface opposite to the first surface so as to enable the etching liquid or the etching gas to reach the first layer, and the first layer is divided by a region which is located between a portion of the first layer covering the energy generation elements and a portion of the first layer to which the etching liquid or the etching gas is reached.
    Type: Application
    Filed: April 27, 2018
    Publication date: November 8, 2018
    Inventors: Satoshi Ibe, Kenji Fujii, Yusuke Hashimoto, Shuhei Oya, Hirohisa Fujita
  • Patent number: 9799526
    Abstract: An etching method includes etching a silicon substrate with a liquid composition containing an alkaline organic compound, water, and a boron compound with a content in the range of 1% by mass to 14% by mass. The boron compound is at least one of boron sesquioxide, sodium tetraborate, metaboric acid, sodium perborate, sodium borohydride, zinc borate, and ammonium borate.
    Type: Grant
    Filed: July 13, 2015
    Date of Patent: October 24, 2017
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Hirohisa Fujita, Taichi Yonemoto, Shuji Koyama
  • Publication number: 20160020113
    Abstract: An etching method includes etching a silicon substrate with a liquid composition containing an alkaline organic compound, water, and a boron compound with a content in the range of 1% by mass to 14% by mass. The boron compound is at least one of boron sesquioxide, sodium tetraborate, metaboric acid, sodium perborate, sodium borohydride, zinc borate, and ammonium borate.
    Type: Application
    Filed: July 13, 2015
    Publication date: January 21, 2016
    Inventors: Hirohisa Fujita, Taichi Yonemoto, Shuji Koyama
  • Patent number: 9211707
    Abstract: A method for manufacturing an inkjet recording head includes preparing a substrate having a mold to become an ink flow passage and an orifice layer covering the mold, and immersing the substrate in a solvent, whereby in immersing the substrate in the solvent, the mold at the substrate immersed in the solvent is irradiated with deep-UV light.
    Type: Grant
    Filed: October 19, 2012
    Date of Patent: December 15, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hirohisa Fujita, Shuji Koyama, Hiroyuki Abo
  • Patent number: 9040431
    Abstract: A method for processing a silicon wafer is provided. The method includes allowing an etchant to flow along a surface of the silicon wafer to form a line in which a plurality of apertures are arranged in a flow direction of the etchant from an upstream side to a downstream side. The apertures arranged in the line include a first aperture formed on the most upstream side and a second aperture formed downstream of the first aperture in the flow direction of the etchant. The first aperture and the second aperture are subjected to different processes after being formed.
    Type: Grant
    Filed: June 24, 2013
    Date of Patent: May 26, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hirohisa Fujita, Shuji Koyama, Keiji Matsumoto, Kenta Furusawa
  • Publication number: 20140004629
    Abstract: A method for processing a silicon wafer is provided, the method including allowing an etchant to flow along a surface of the silicon wafer to form a line in which a plurality of apertures are arranged in a flow direction of the etchant from an upstream side to a downstream side, wherein the apertures arranged in the line includes a first aperture formed on the most upstream side and a second aperture formed downstream of the first aperture in the flow direction of the etchant, and wherein the first aperture and the second aperture are subjected to different processes after being formed.
    Type: Application
    Filed: June 24, 2013
    Publication date: January 2, 2014
    Inventors: Hirohisa Fujita, Shuji Koyama, Keiji Matsumoto, Kenta Furusawa
  • Publication number: 20110036776
    Abstract: A processing method of liquid includes: decomposing a resin in liquid by allowing ozone gas to contact the liquid containing a water-soluble carbonyl compound and the resin; and removing organic acid generated by decomposing the resin in the decomposing step from the liquid by performing on the liquid after being subjected to the decomposing step an ion exchange process using an ion exchange resin. The liquid to be subjected to the ion exchange process contains water.
    Type: Application
    Filed: August 10, 2010
    Publication date: February 17, 2011
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Hirohisa Fujita, Masashi Miyagawa, Takeshi Takada, Kouji Inoue
  • Patent number: 7092829
    Abstract: In an instantaneous wire interruption detection system for a vehicle electrical system, a VSC-ECU includes an input processing circuit that processes electric signals transmitted from various sensors and an EFI-ECU by a signal wire (wire harness); a signal state determination circuit that determines whether the electric signals processed by the input processing circuit are normal or abnormal; a latch circuit that latches the determination result as a latch signal; and an output circuit that can output the latch signal. When a signal abnormality is detected by the signal state determination circuit, the latch circuit is able to generate the latch signal in synchronization therewith, and latch the latch signal for a predetermined time. Accordingly, for example, by connecting a tester device to the output circuit, and monitoring the latch signal, it is possible to detect instantaneous wire interruption of the electrical system.
    Type: Grant
    Filed: January 29, 2004
    Date of Patent: August 15, 2006
    Assignees: Advics Co., Ltd., Denso Corporation
    Inventors: Masayasu Kato, Nobuhiko Makino, Hirohisa Fujita, Toyoharu Katsukura
  • Patent number: 7082357
    Abstract: When a resistance value of a CAN bus main line is 60 ?, the CAN bus main line is in a normal state. However, the resistance value thereof differs depending on an abnormality portion when an abnormality such as disconnection, short circuit, or the like has occurred in it or a branch line. Therefore, the abnormality portion can be identified depending on the measured resistance value. In addition, a failure diagnosis portion of an ECU stores different diagnosis trouble codes in the memory for the following cases; when an abnormality has occurred in the CAN bus communication, when various sensors are malfunctioning, and when an abnormality such as disconnection has occurred in a communication line that is connected to the various sensors. Accordingly, the resistance value of the CAN bus main line is measured, and the abnormality portion can be identified by a combination of the resistance value and the diagnosis trouble code.
    Type: Grant
    Filed: January 20, 2004
    Date of Patent: July 25, 2006
    Assignees: Advics Co., Ltd., Denso Corporation
    Inventors: Hirohisa Fujita, Nobuhiko Makino, Masayasu Kato, Toyoharu Katsukura
  • Publication number: 20040220776
    Abstract: In an instantaneous wire interruption detection system for a vehicle electrical system, a VSC-ECU includes an input processing circuit that processes electric signals transmitted from various sensors and an EFI-ECU by a signal wire (wire harness); a signal state determination circuit that determines whether the electric signals processed by the input processing circuit are normal or abnormal; a latch circuit that latches the determination result as a latch signal; and an output circuit that can output the latch signal. When a signal abnormality is detected by the signal state determination circuit, the latch circuit is able to generate the latch signal in synchronization therewith, and latch the latch signal for a predetermined time. Accordingly, for example, by connecting a tester device to the output circuit, and monitoring the latch signal, it is possible to detect instantaneous wire interruption of the electrical system.
    Type: Application
    Filed: January 29, 2004
    Publication date: November 4, 2004
    Inventors: Masayasu Kato, Nobuhiko Makino, Hirohisa Fujita, Toyoharu Katsukura
  • Publication number: 20040153223
    Abstract: When a resistance value of a CAN bus main line is 60 &OHgr;, the CAN bus main line is in a normal state. However, the resistance value thereof differs depending on an abnormality portion when an abnormality such as disconnection, short circuit, or the like has occurred in it or a branch line. Therefore, the abnormality portion can be identified depending on the measured resistance value.
    Type: Application
    Filed: January 20, 2004
    Publication date: August 5, 2004
    Inventors: Hirohisa Fujita, Nobuhiko Makino, Masayasu Kato, Toyoharu Katsukura