Patents by Inventor Hirohisa Shishikura

Hirohisa Shishikura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5319602
    Abstract: In a combination of a printed wiring board and a memory device selecting circuit provided on the printed wiring board, the printed wiring board is provided with a predetermined number of device mount areas and a conductor pattern for connection with memory devices in the device mount areas. The number of the memory devices actually mounted in the mount areas is set in a device-number setting device, and in accordance with a predetermined bits of address code and on the basis of the number set, device select signals are produced, and are distributed over the conductor pattern. Identical printed wiring boards and memory device selecting circuits can be used, without alteration or re-designing, for forming electronic devices having different memory capacities or different number of memory devices.
    Type: Grant
    Filed: August 17, 1992
    Date of Patent: June 7, 1994
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Hirohisa Shishikura
  • Patent number: 4675868
    Abstract: An error correction system for a difference set cyclic (272,190) code with 190 data bits and 82 test bits in a coded transmission teletext system which transmits character information on the vertical blanking interval of a television signal has been improved in peripheral circuits for operating an error correction circuit. A first improvement is to correct only designated packets which are in frame synchronization condition and/or designated by an index register. A second improvement is to handle shortened (L,k) code where L is less than 272, using common hardware. A third improvement is selection of three operational modes of data to be corrected. In the first mode, uncorrected data is supplied by an external circuit, and said uncorrected data is stored temporarily in a buffer memory, and corrected data is stored in said buffer memory again to supply external circuit corrected data. Transfer of data between the buffer memory and the error correction circuit is handled by wired logic hardware apparatus.
    Type: Grant
    Filed: March 26, 1985
    Date of Patent: June 23, 1987
    Assignees: OKI Electric Industry Co., Ltd., Nippon Hoso Kyokai
    Inventors: Hirohisa Shishikura, Ichiro Sase, Akio Yanagimachi, Osamu Yamada
  • Patent number: 4672612
    Abstract: An error correction system for a difference set cyclic (272, 190) code with 190 data bits and 82 test bits in a packet which is transmitted on a vertical blanking interval of a television signal has been improved. The present system comprises a buffer memory for storing an original data which is subject to correction and corrected data, and an error correction circuit having at least a syndrome register, a majority circuit and a data register. The data transfer between the buffer memory and the error correction circuit is effected by wired logic hardware means without using software operation time of a programmed computer so that computer operation time is not wasted merely for error correction.
    Type: Grant
    Filed: March 26, 1985
    Date of Patent: June 9, 1987
    Assignees: OKI Electric, Nippon Hoso Kyokai, Victor Co.
    Inventors: Hirohisa Shishikura, Ichiro Sase, Akio Yanagimachi, Osamu Yamada, Shigeharu Ueguri
  • Patent number: 3955892
    Abstract: Light emitting elements such as light emitting diodes provided in the viewfinder of a camera are connected with a light measuring circuit including a photodetector through an A-D converter, a decoder and a gate circuit so that the light emitting elements may indicate exposure information in a digital form in accordance with the output of the light measuring circuit. An oscillator is connected with the A-D converter and the gate circuit for giving sampling pulses to the A-D converter and clock pulses to the gate circuit. Between the oscillator and the gate circuit is provided a duty modulator to change the duty cycle of the square wave transmitted from the oscillator to the gate circuit. The duty modulator is connected with the light measuring circuit or the A-D converter so as to control the duty cycle of the square wave in accordance with the output from the light measuring circuit.
    Type: Grant
    Filed: July 29, 1974
    Date of Patent: May 11, 1976
    Assignees: Fuji Photo Optical Co., Ltd., Oki Electric Industry Company, Ltd.
    Inventors: Saburo Numata, Iwao Sagara, Hirohisa Shishikura
  • Patent number: 3956758
    Abstract: An exposure indicating means comprising a plurality of light emitting elements which are selectively energized to indicate exposure information in a digital form is connected with an exposure measuring circuit. The light emitting elements are connected with a warning circuit. The warning circuit comprises a warning signal generator which generates a warning signal when a warning is required, a square wave generator which constantly generates a square wave and an AND circuit which transmits the square wave to the light emitting elements when the warning signal is transmitted thereto. The light emitting elements are intermittently turned off by the square wave coming from the AND circuit. The frequency of the square wave is selected so that the intermittent turning off of the light emitting elements is sensed by the photographer viewing through the viewfinder of the camera.
    Type: Grant
    Filed: July 29, 1974
    Date of Patent: May 11, 1976
    Assignees: Fuji Photo Optical Co., Ltd., Oki Electric Industry Company, Ltd.
    Inventors: Saburo Numata, Iwao Sagara, Hirohisa Shishikura
  • Patent number: 3932865
    Abstract: An accurate, simple and compact analog-to-digital converter has been found. The converter comprisesA voltage divider circuit including a plurality of stepped voltage dividing points separated by a plurality of resistors for dividing the input voltage received from the analog input terminal;A group of switches for receiving said divided voltages; andA switching decision circuit for determining the amplitude of the voltage from a decision point through said switch group, the output of said decision circuit being applied to a logic circuit to provide digital signal output.
    Type: Grant
    Filed: May 22, 1974
    Date of Patent: January 13, 1976
    Assignee: Oki Electric Industry Company, Ltd.
    Inventors: Iwao Sagara, Hirohisa Shishikura, Ikuo Anada