Patents by Inventor Hirohisa Yamamoto
Hirohisa Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11929655Abstract: An embodiment includes: a first transport module on which a carriage moves; a second transport module that is configured to be able to move to a position for connecting to the first transport module and on which the carriage is able to move to and from the first transport module; a position detection unit that detects a position in a moving direction of the second transport module and outputs position information; a first control unit that controls motion of the carriage on the first transport module; a second control unit that controls motion of the carriage on the second transport module; a third control unit that controls motion of the second transport module; and a fourth control unit that controls the first to third control units. The fourth control unit corrects a position where the second transport module connects to the first transport module based on the position information.Type: GrantFiled: February 19, 2021Date of Patent: March 12, 2024Assignee: CANON KABUSHIKI KAISHIInventors: Hirohisa Ota, Takeshi Yamamoto, Satoru Deguchi, Takashi Shigemori, Kichinosuke Hirokawa, Ryota Okazaki
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Patent number: 11394512Abstract: A wireless communication terminal includes: a wireless communication part configured to transmit temporarily remaining information, which is information linked with place and time, to a communication base station and receive the temporarily remaining information stored in the communication base station from the communication base station; a storage device in which the temporarily remaining information received by the wireless communication part is stored; and a deletion part configured to, after receipt of the temporarily remaining information, delete the temporarily remaining information having passed a predetermined time specified in advance.Type: GrantFiled: December 27, 2018Date of Patent: July 19, 2022Assignee: NEC CORPORATIONInventor: Hirohisa Yamamoto
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Publication number: 20200389275Abstract: A wireless communication terminal includes: a wireless communication part configured to transmit temporarily remaining information, which is information linked with place and time, to a communication base station and receive the temporarily remaining information stored in the communication base station from the communication base station; a storage device in which the temporarily remaining information received by the wireless communication part is stored; and a deletion part configured to, after receipt of the temporarily remaining information, delete the temporarily remaining information having passed a predetermined time specified in advance.Type: ApplicationFiled: December 27, 2018Publication date: December 10, 2020Applicant: NEC CORPORATIONInventor: Hirohisa YAMAMOTO
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Patent number: 7902027Abstract: A semiconductor device includes a recessed-channel-array MOSFET including a gate electrode having a portion received in a recess. The gate insulting film has a first portion made of silicon oxide in contact with the sidewall of the recess and a second portion made of silicon oxynitride in contact with the bottom of the recess. The first portion has an equivalent oxide thickness larger than the equivalent oxide thickness of the second portion to reduce the parasitic capacitance of the gate electrode.Type: GrantFiled: October 22, 2009Date of Patent: March 8, 2011Assignee: Elpida Memory, Inc.Inventor: Hirohisa Yamamoto
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Patent number: 7745303Abstract: The present invention provides a method of manufacturing a trench with a rounded corner portion and a broadened opening. Anisotropic oxidation is carried out using a halogen oxidation method using dichloroethylene (DCE) to form an anisotropic oxide film such that the film thickness in a shoulder portion of the trench is thick and gradually decreases nearer the bottom, the anisotropic oxide film is removed, and the shoulder portion of the trench is preferentially backed off, thereby rounding the shoulder portion sufficiently to broaden the opening. Then, an insulating member is embedded in the trench. The rounded portion of the shoulder portion of the trench and vicinity thereof is used as a channel of a MOS transistor.Type: GrantFiled: July 26, 2006Date of Patent: June 29, 2010Assignee: Elpida Memory Inc.Inventor: Hirohisa Yamamoto
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Publication number: 20100041197Abstract: A semiconductor device includes a recessed-channel-array MOSFET including a gate electrode having a portion received in a recess. The gate insulting film has a first portion made of silicon oxide in contact with the sidewall of the recess and a second portion made of silicon oxynitride in contact with the bottom of the recess. The first portion has an equivalent oxide thickness larger than the equivalent oxide thickness of the second portion to reduce the parasitic capacitance of the gate electrode.Type: ApplicationFiled: October 22, 2009Publication date: February 18, 2010Applicant: ELPIDA MEMORY, INC.Inventor: Hirohisa YAMAMOTO
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Patent number: 7539731Abstract: A sender of a message uses a sender's portable telephone device to register, by way of a communication network, to a service agent: user's information, communication partner information, sending conditions, and a message. The service agent monitors whether the sending conditions are met, and when the sending conditions have been satisfied, executes processing to send the entered message to the receiver's portable telephone device of the communication partner that has been registered. The sending conditions include conditions relating to presence information that the communication partner can always access by way of a communication network through the communication partner's own communication terminal.Type: GrantFiled: July 13, 2004Date of Patent: May 26, 2009Assignee: NEC CorporationInventors: Hirohisa Yamamoto, Kenichi Okazaki, Tsutomu Iitsuka
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Publication number: 20080042195Abstract: A semiconductor device includes a recessed-channel-array MOSFET including a gate electrode having a portion received in a recess. The gate insulting film has a first portion made of silicon oxide in contact with the sidewall of the recess and a second portion made of silicon oxynitride in contact with the bottom of the recess. The first portion has an equivalent oxide thickness larger than the equivalent oxide thickness of the second portion to reduce the parasitic capacitance of the gate electrode.Type: ApplicationFiled: August 10, 2007Publication date: February 21, 2008Applicant: ELPIDA MEMORY, INC.Inventor: Hirohisa YAMAMOTO
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Publication number: 20070026632Abstract: The present invention provides a method of manufacturing a trench with a rounded corner portion and a broadened opening. Anisotropic oxidation is carried out using a halogen oxidation method using dichloroethylene (DCE) to form an anisotropic oxide film such that the film thickness in a shoulder portion of the trench is thick and gradually decreases nearer the bottom, the anisotropic oxide film is removed, and the shoulder portion of the trench is preferentially backed off, thereby rounding the shoulder portion sufficiently to broaden the opening. Then, an insulating member is embedded in the trench. The rounded portion of the shoulder portion of the trench and vicinity thereof is used as a channel of a MOS transistor.Type: ApplicationFiled: July 26, 2006Publication date: February 1, 2007Inventor: Hirohisa Yamamoto
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Publication number: 20050013291Abstract: A sender of a message uses a sender's portable telephone device to register, by way of a communication network, to a service agent: user's information, communication partner information, sending conditions, and a message. The service agent monitors whether the sending conditions are met, and when the sending conditions have been satisfied, executes processing to send the entered message to the receiver's portable telephone device of the communication partner that has been registered. The sending conditions include conditions relating to presence information that the communication partner can always access by way of a communication network through the communication partner's own communication terminal.Type: ApplicationFiled: July 13, 2004Publication date: January 20, 2005Inventors: Hirohisa Yamamoto, Kenichi Okazaki, Tsutomu Iitsuka
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Patent number: 6797048Abstract: The present invention provides a method for preparing a glass-ceramic containing leucite crystals, comprising the steps of: mixing (1) a glassy material comprising 53 to 65 wt. % of SiO2, 13 to 23 wt. % of Al2O3, 9 to 20 wt. % of K2O and 6 to 12 wt. % of Na2O and (2) synthetic leucite seed crystals comprising 53 to 64 wt. % of SiO2, 19 to 27 wt. % of Al2O3 and 17 to 25 wt. % of K2O, and heat-treating the mixture at 750 to 950° C. for 1 to 5 hours; and a dental porcelain powder and a metal-ceramic restoration both comprising a glass-ceramic prepared by the method. The porcelain comprising the glass-ceramic prepared by the method is substantially free of opacification and decrease in the coefficient of thermal expansion, during fusion-bonding to a metal frame.Type: GrantFiled: July 3, 2002Date of Patent: September 28, 2004Assignee: Yamamoto Precious Metal Co., Ltd.Inventors: Takeshi Hoshikawa, Masatoshi Yamazoe, Hirohisa Yamamoto, Teruo Anraku
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Patent number: 6631376Abstract: An exchange servicing development support system automatically replaces definition contents and creates generation codes to new specifications, even if interfacing is changed, by reading servicing definition result files stored in accordance with old specifications. By providing a unit for re-constructing service tree structure data in a format in accordance with information about compatibility description in a menu describing file, the service tree structure data is automatically created. Since information about compatibility is allocated to the menu describing a file stored in the storage device, each unit in the data processing device is adapted to be used for a general purpose. The description of replacement of various patterns can be made by descriptions of information about compatibility in the menu describing file.Type: GrantFiled: December 23, 1999Date of Patent: October 7, 2003Assignee: NEC CorporationInventors: Hirohisa Yamamoto, Takashi Shinoda
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Patent number: 6624095Abstract: A wafer 38 having an exposed portion of silicon is transferred to a treatment chamber for lamp annealing. The atmosphere of the treatment chamber 32 is converted to a reduced pressure atmosphere (500 Torr) of an inert gas (N2). The wafer 38 is subjected to lamp annealing in the reduced pressure atmosphere of the inert gas (1050° C., 30 seconds).Type: GrantFiled: July 10, 2000Date of Patent: September 23, 2003Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Hirohisa Yamamoto
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Publication number: 20030056692Abstract: The present invention provides a method for preparing a glass-ceramic containing leucite crystals, comprising the steps of: mixing (1) a glassy material comprising 53 to 65 wt. % of SiO2, 13 to 23 wt. % of Al2O3, 9 to 20 wt. % of K2O and 6 to 12 wt. % of Na2O and (2) synthetic leucite seed crystals comprising 53 to 64 wt. % of SiO2, 19 to 27 wt. % of Al2O3 and 17 to 25 wt. % of K20, and heat-treating the mixture at 750 to 950° C. for 1 to 5 hours; and a dental porcelain powder and a metal-ceramic restoration both comprising a glass-ceramic prepared by the method. The porcelain comprising the glass-ceramic prepared by the method is substantially free of opacification and decrease in the coefficient of thermal expansion, during fusion-bonding to a metal frame.Type: ApplicationFiled: July 3, 2002Publication date: March 27, 2003Inventors: Takeshi Hoshikawa, Masatoshi Yamamzoe, Hirohisa Yamamoto, Teruo Anraku
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Patent number: 5734381Abstract: The invention provides a cancel/undo method and system wherein the undo data amount upon changing of a tree structure is compressed and a cancel operation and an undo operation are united to significantly reduce the memory consumption and the processing time. A cancel data list and a undo data list are prepared, and undo data are classified into cancel type undo data and uncancel type undo data. Changed content information of tree structure data includes differential information of a changing object node position and a lower hierarchy side tree structure of the changing object node. Upon do operation, contents of the change are added as cancel data to the cancel data list while a cancel type is added to the undo data list. When cancel type data is object data of a cancel operation or an undo operation, a tree structure is restored with the last data of the cancel data list, and the data and contents of the change by the operation are added to the undo data list.Type: GrantFiled: December 21, 1995Date of Patent: March 31, 1998Assignee: NEC CorporationInventors: Masaharu Yoshizawa, Tetsuro Nishida, Hirohisa Yamamoto, Katsuki Satozaki
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Patent number: 5404309Abstract: A CAD apparatus for designing a pattern of an electric circuit, is provided with: a printed resistor shape parameter storing unit for storing values of printed resistor shape parameters including a maximum aspect ratio and a minimum aspect ratio of a printed resistor, which pattern is to be designed; a resistor parameter storing unit for storing values of resistor parameters including a necessary resistance of the printed resistor; a resistor material table storing unit for storing a resistor material table including names of various resistor materials and resistances per unit area of the various resistor materials correspondingly; and an optimum resistor material name storing unit for storing an optimum resistor material name of the printed resistor.Type: GrantFiled: January 31, 1992Date of Patent: April 4, 1995Assignee: Sharp Kabushiki KaishaInventors: Hirohisa Yamamoto, Toshiaki Nagakawa, Takuji Kurimoto
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Patent number: 5354986Abstract: An ion implantation apparatus includes a charge neutralizer having a control circuit which controls the quantity of secondary electrons irradiating a semiconductor wafer. Electrons are generated in response to a direction of movement of a semiconductor wafer to neutralize positive charge on the semiconductor wafer. The apparatus can neutralize the positive charge homogeneously and prevent electrical breakdown of the semiconductor wafer.Type: GrantFiled: November 12, 1992Date of Patent: October 11, 1994Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Satoshi Yamada, Hirohisa Yamamoto, Shigeru Shiratake
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Patent number: 5293508Abstract: An ion implanter encloses a semiconductor substrate adjacent to a fixing member which retains a semiconductor substrate on a supporting bed. The ion implanter includes a ring electrode for generating secondary electrons in response to incident ions and a cup-like electrode for directing the secondary ions to the semiconductor substrate. The ring electrode is negatively biased with respect to the supporting bed and the cup-like electrode surrounds the outer edge of the semiconductor substrate. The ion implanter increases the quantity of the secondary electrons produced and efficiently directs them to the semiconductor substrate. The semiconductor substrate which is electrically charged by implanting ions is neutralized, preventing dielectric breakdown from occurring in an insulating film.Type: GrantFiled: April 8, 1992Date of Patent: March 8, 1994Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Shigeru Shiratake, Hirohisa Yamamoto
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Patent number: 5187558Abstract: A resin sealed semiconductor device includes a semiconductor chip formed on a substrate and sealed with resin. A concave portion is formed on a major surface of a semiconductor substrate between an insulating film for isolation and an edge of the major surface of the semiconductor substrate. This concave portion is filled with a buffer member having an elastic modulus smaller than that of the material of the semiconductor substrate. Mechanical stress applied to an edge of the semiconductor substrate, caused by the callosity of resin, is absorbed and reduced by the buffer member. A portion of the semiconductor substrate between the concave portion and the insulating film for isolation prevents the remainder of the mechanical stress from being transmitted from the buffer member to the insulating film and circuit elements.Type: GrantFiled: May 1, 1990Date of Patent: February 16, 1993Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Yuichi Nakashima, Mitsuhiro Tomikawa, Hirohisa Yamamoto