Patents by Inventor Hiroichi Shinohara

Hiroichi Shinohara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5449948
    Abstract: Integrated circuit devices, chips and methods of making and operating them are disclosed. The devices are specially adapted for high frequency operation e.g. at or above 1 GHz. Inductive noise caused by switching at these frequencies--and which can interfere with switching--is inhibited by using a large bypass capacitor connected between power and ground connections outside the chip, and a small bypass capacitor connected between the same power and ground connections but formed inside the chip. The smaller capacitor cuts noise attributable to the wiring between the larger capacitor and the chip. The chip can have many of the smaller capacitors, even one or more per gate. In the preferred embodiments, the small capacitors from power and ground bonding pads are formed at the front surface of the chip substrate. Tantalum pentoxide, and other suitable dielectrics having relative dielectric constant of 10 or more at 1 GHz, are used to form the capacitors.
    Type: Grant
    Filed: April 1, 1991
    Date of Patent: September 12, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Hirokazu Inoue, Tomoji Oishi, Hiroichi Shinohara, Ken Takahashi, Tetsuo Nakazawa, Mitsuo Usami, Masaki Fukuoka
  • Patent number: 5315482
    Abstract: A semiconductor apparatus comprises a heat diffusing plate and a surface installing printed board. A semiconductor device of a high heat generation is installed on the heat diffusing plate. A surface installing package and chip parts are installed on both surfaces of the printed board. A through hole is formed at the center of the printed board so that the semiconductor device is located at the center. The heat diffusing plate on which the semiconductor device has been installed and the surface installing printed board are connected and integrated.
    Type: Grant
    Filed: October 15, 1992
    Date of Patent: May 24, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Akira Tanaka, Hiroichi Shinohara, Kazuji Yamada, Takao Ohba, Akira Yamagiwa, Hitoshi Yoshidome, Yuji Shirai, Toshio Hatada, Munehisa Kishimoto, Michiharu Honda
  • Patent number: 5177670
    Abstract: Noise generated at high frequencies at the time of simultaneous switchings of logical circuits is reduced by lowering an inductance from LSI to a capacitor formed on a substrate. The capacitor is formed to ensure that an inductance from a bonding pad for the LSI loaded on the substrate to an electrode of the capacitor is 0.05 nanohenry. The lower inductance from the LSI to the capacitor allows a reduction in the amount of the noise at high frequencies among those generated in power supply system, whereby the rising time of signals is made shorter, and the speed of arithmetic operation can be increased.
    Type: Grant
    Filed: February 7, 1992
    Date of Patent: January 5, 1993
    Assignee: Hitachi, Ltd.
    Inventors: Hiroichi Shinohara, Hirokazu Inoue, Yoichi Abe, Akira Kato, Hideo Suzuki, Kazuji Yamada, Masaaki Takahashi, Keiichirou Nakanishi
  • Patent number: 4998159
    Abstract: The present invention provides a ceramic laminated circuit substrate which is less in fluctuation of degree of shrinkage at firing and is less in voids and is suitable for formation of functional modules. This substrate comprises a conductor layer and a plurality of ceramic insulating layers wherein said ceramic insulating layers include at least one fiber-containing composite ceramic insulating layer. The present invention further provides a method for making this substrate which comprises preparing fiber-containing composite green sheets by adding to a green sheet raw material at least one of whiskers, glass filaments and chopped strands as fibers, laminating these fiber-containing composite green sheets in such direction that their casting directions are different together with green sheets containing no fibers to form a laminate and firing this laminate.
    Type: Grant
    Filed: June 8, 1989
    Date of Patent: March 5, 1991
    Assignee: Hitachi, Ltd.
    Inventors: Hiroichi Shinohara, Hideo Suzuki, Satoru Ogihara, Hideo Arakawa
  • Patent number: 4970577
    Abstract: A semiconductor chip module includes semiconductor chips each of which has contacts on its entire front face. A multi-layered organic circuit board having a small dielectric constant is provided for mounting the semiconductor chips. Intermediate ceramic substrates having the same thermal expansion coefficient as that of the semiconductor chip, are also provided. Each such intermediate ceramic substrate has contacts on its front and back faces corresponding to those of the semiconductor chip. These contacts are electrically connected directly in a one-to-one relationship. The contacts on the semiconductor chip and the corresponding ones on the front face of the intermediate ceramic substrates are connected by solder. The contacts on the back face of the intermediate ceramic substrate and the corresponding contacts on the front face of the multi-layered ceramic circuit board are connected by respective conductive pins having a predetermined flexibility and rigidity through a predetermined gap therebetween.
    Type: Grant
    Filed: April 12, 1989
    Date of Patent: November 13, 1990
    Assignee: Hitachi, Ltd.
    Inventors: Satoru Ogihara, Shunichi Numata, Kunio Miyazaki, Takashi Yokoyama, Ken Takahashi, Tasao Soga, Kazuji Yamada, Hiroichi Shinohara, Hideo Suzuki
  • Patent number: 4954877
    Abstract: The present invention relates to a chip carrier, on which LSI chips are mounted and a chip carrier is disclosed, in which a region where power source throughholes are arranged and a region where signal throughholes are arranged are separated from each other and a coupling capacitor is formed only in the region where the power source throughholes are arranged with an intention to reduce noise.
    Type: Grant
    Filed: August 2, 1989
    Date of Patent: September 4, 1990
    Assignee: Hitachi, Ltd.
    Inventors: Keiichirou Nakanishi, Minoru Yamada, Masakazu Yamamoto, Satoru Ogihara, Hiroichi Shinohara, Hideo Suzuki
  • Patent number: 4919524
    Abstract: A variable focus lens for use in reproducing images includes first, second, third, and fourth lens groups arranged successively from an object to an image, and a diaphragm disposed between the second and third lens groups. The first lens group comprises a concave meniscus lens with its concave surface facing the object. The second lens group comprises a double convex lens with the larger absolute value of the radius of curvature of its surface facing the image, a double concave lens with the larger absolute value of the radius of curvature of its surface facing the object, and a double convex lens, the lenses being arranged successively in the order named from the object. The third lens group is of the same construction as the second lens group except that the lenses of the third lens group are arranged and faced in the opposite direction to the second lens group, the second and third lens groups being positioned symmetrically with respect to the diaphragm.
    Type: Grant
    Filed: April 13, 1989
    Date of Patent: April 24, 1990
    Assignee: Ricoh Company, Ltd.
    Inventor: Hiroichi Shinohara
  • Patent number: 4858077
    Abstract: A condenser-containing, ceramic multi-layer circuit board which comprises a plurality of layers of ceramic insulating material having circuit conductors, throughholes and condensers composed of ceramic dielectric condenser material having a higher dielectric constant than that of the ceramic insulating material and a pair of electrodes sandwiching the ceramic dielectric condenser material, the condensers being in a layer structure with openings concentric to the individual throughholes and having a larger diameter than the diameter of the throughholes with a distance between the condenser opening edges surrounding the corresponding throughholes and the throughhole peripheral edges, thereby forming clearances therebetween and the ceramic insulating material being filled in the clearances between the condenser opening edges and the corresponding throughhole peripheral edges without any contact with the ceramic dielectric condenser material and the throughholes can reduce electric noises owing to the presence of
    Type: Grant
    Filed: November 25, 1988
    Date of Patent: August 15, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Hiroichi Shinohara, Hideo Suzuki, Satoru Ogihara
  • Patent number: 4821142
    Abstract: A ceramic multilayer circuit board comprising ceramic layers and wiring conductor layers laminated alternately, in which the ceramic layer has a thermal expansion coefficient lower than that of the wiring conductor and not lower than one half of that of the conductor layer and is formed from a glass which softens at a temperature not higher than the melting point of the wiring conductor layer; a semiconductor module having a high reliability in its solder joint part comprising said ceramic multilayer circuit board mounted with a ceramic carrier substrate being mounted with a semiconductor device, said board being able to use a silver or copper conductor having a good electro-conductivity; and an amorphous glass powder for said ceramic multilayer circuit board.
    Type: Grant
    Filed: June 4, 1987
    Date of Patent: April 11, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Nobuyuki Ushifusa, Hiroichi Shinohara, Kousei Nagayama, Satoru Ogihara, Tasao Soga
  • Patent number: 4736276
    Abstract: Ceramic insulating substrate layers (1) for a multilayered ceramic wiring circuit board (3) consist essentially of crystals of mullite and sillimanite, non-crystalline silicon dioxide occupying the interstices between the crystals and magnesium oxide dissolved substantially in the crystals in solid solution and have a thermal expansion coefficient of 40-60.times.10.sup.-7 /.degree. C. and a dielectric constant below 6.7.
    Type: Grant
    Filed: May 21, 1986
    Date of Patent: April 5, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Nobuyuki Ushifusa, Satoru Ogihara, Kousei Nagayama, Hiroichi Shinohara, Gyozo Toda
  • Patent number: 4671627
    Abstract: A high resolving power Gaussian lens used for a facsimile or the like which uses high-density solid image forming elements. To achieve this object, it is necessary to maintain a high resolving power to cover the marginal portion of the image plane. In the Gaussian lens comprising four groups of lenses and being symmetrical to a diaphragm, each lens group comprises a cemented lens composed of a positive meniscus lens with a concave surface directed toward the diaphragm and a negative meniscus lens. The positive lens has a refractive index in excess of 1.74 to flatten an image surface. The second lens group and the third lens group are reduced in thickness to make it possible to have a wider angle.
    Type: Grant
    Filed: October 8, 1985
    Date of Patent: June 9, 1987
    Assignee: Ricoh Company, Ltd.
    Inventor: Hiroichi Shinohara
  • Patent number: 4672152
    Abstract: A ceramic insulating layer (2) for the multilayer ceramic circuit board (11) consists of 60 wt % of crystallized glass and 40 wt % of a filler such as silicon dioxide bonded by the crystallized glass, which consists of 6-15 wt % of lithium oxide, 70-90 wt % of silicon dioxide, 1-8 wt % of aluminum oxide, 1-5 wt % of alkaline metal oxide other than lithium oxide and 2-5 wt % of alkaline earth metal oxide. The sintered ceramic insulating layer (2) has a dielectric constant below 6.1 and a flexural strength above 150 MPa and is co-firable with a wiring conductor layer of such as gold, silver and copper.
    Type: Grant
    Filed: July 23, 1986
    Date of Patent: June 9, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Hiroichi Shinohara, Nobuyuki Ushifusa, Kousei Nagayama, Satoru Ogihara
  • Patent number: 4490019
    Abstract: A stop is disposed forwardly of the lens system which comprises three individual lenses. A first lens located nearest the stop represents a positive meniscus lens, followed by a second and a third individual lens, both of which represent negative meniscus lenses. Each of the first to the third lens has its concave surface directed toward the stop. A small air gap exists between the second and the first lens. Representing the focal length of the first lens by f.sub.1, the composite focal length of the first and the second lens by f.sub.1,2, the composite focal length of the first to the third lens by f, the radius of curvature of a second refractive surface in the lens system by r.sub.3, the radius of curvature of a third refractive surface by r.sub.4, the refractive index of the first lens by n.sub.1, and the Abbe number of the first and the second lens by .nu..sub.1, .nu..sub.2, respectively, these parameters satisfy the following inequalities.(1) 5.32<f/f.sub.1 <5.52(2) 0.9<f/f.sub.1,2 <1.
    Type: Grant
    Filed: October 22, 1982
    Date of Patent: December 25, 1984
    Assignee: Ricoh Company, Ltd.
    Inventor: Hiroichi Shinohara
  • Patent number: 4415241
    Abstract: An improved tessor type lens system for facsimile having a large aperture ratio and a high contrast are provided. The lens system comprises for components between object and image as follows; a first positive meniscus lens element, a second biconcave lens element, a third meniscus shaped doublet. The entire lens system is capable of providing an aperture ratio greater than 90% and a half angle of image of approximately 18.degree. with an f number of 4.5.
    Type: Grant
    Filed: September 22, 1980
    Date of Patent: November 15, 1983
    Assignee: Ricoh Co., Ltd.
    Inventor: Hiroichi Shinohara
  • Patent number: 4345823
    Abstract: A reproduction lens assembly including two groups of three elements for providing a large aperture efficiency and a compact size formed by arranging a lens system symmetrically with respect to a stop wherein the each group of three elements further comprise a first convex Meniscus lens having a concave surface thereof directed toward the stop, the stop being positioned on the front side of the first Meniscus lens, a second concave Meniscus lens having a concave surface thereof directed toward the stop and a third convex Meniscus lens having a concave surface thereof directed toward the stop with a small air gap the third and second Meniscus lens.
    Type: Grant
    Filed: March 12, 1980
    Date of Patent: August 24, 1982
    Assignee: Kabushiki Kaisha Ricoh
    Inventor: Hiroichi Shinohara
  • Patent number: RE34887
    Abstract: A ceramic multilayer circuit board comprising ceramic layers and wiring conductor layers laminated alternately, in which the ceramic layer has a thermal expansion coefficient lower than that of the wiring conductor and not lower than one half of that of the conductor layer and is formed from a glass which softens at a temperature not higher than the melting point of the wiring conductor layer; a semiconductor module having a high reliability in its solder joint part comprising said ceramic multilayer circuit board mounted with a ceramic carrier substrate being mounted with a semiconductor device, said board being able to use a silver or copper conductor having a good electro-conductivity; and an amorphous glass powder for said ceramic multilayer circuit board.
    Type: Grant
    Filed: April 10, 1991
    Date of Patent: March 28, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Nobuyuki Ushifusa, Hiroichi Shinohara, Kousei Nagayama, Satoru Ogihara, Tasao Soga