Patents by Inventor Hiroka IHARA

Hiroka IHARA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12236093
    Abstract: A storage system includes: a central processing unit; a main memory; first management information that associates a hash value of received data with an address in a volume; and an I/O processing package. The I/O processing package includes an I/O processor and an I/O memory. The I/O processor executes protocol processing. The I/O processor executes at least a part of search processing of an address associated with a hash value of first received data in the first management information. The central processing unit controls execution of deduplication processing of the first received data based on data of an address associated with the hash value of the first received data.
    Type: Grant
    Filed: March 1, 2023
    Date of Patent: February 25, 2025
    Assignee: Hitachi Vantara, Ltd.
    Inventors: Hiroka Ihara, Nobuhiro Yokoi, Takashi Nagao, Yoshihiro Yoshii
  • Patent number: 12216930
    Abstract: A primary storage system reads a plurality of journal data, and performs collective compression that is compression of data that is at least a part of the plurality of pieces of journal data in the plurality of journals and is larger than a size of one journal data. The collectively compressed data, which is a plurality of pieces of journal data subjected to collective compression, is a transfer target from the primary storage system to the secondary storage system. The journal is journal data and metadata including a write order of the journal data and associated with the journal data. The journal data is a copy of data written in the primary volume. The secondary storage system acquires a plurality of pieces of journal data by decompressing one or more pieces of collectively compressed data, and writes the plurality of pieces of journal data to the secondary volume.
    Type: Grant
    Filed: May 17, 2023
    Date of Patent: February 4, 2025
    Assignee: Hitachi Vantara, Ltd.
    Inventors: Akira Deguchi, Nobuhiro Yokoi, Hiroka Ihara
  • Publication number: 20250016119
    Abstract: A network interface includes a processor, memory, and a cache between the processor and the memory. The processor secures a plurality of buffers for storing transfer data in the memory, and manages an allocation order of available buffers of the plurality of buffers. The processor returns a buffer released after data transfer to a position before a predetermined position of the allocation order.
    Type: Application
    Filed: September 17, 2024
    Publication date: January 9, 2025
    Inventors: Nobuhiro YOKOI, Hiroka IHARA
  • Publication number: 20240403167
    Abstract: Storage controllers shift from a normal operation mode to a degraded operation mode in accordance with a command from a management apparatus. Each of the storage controllers in the normal operation mode works in the normal operation state. In transition from the normal operation mode to the degraded operation mode in accordance with a command from the management apparatus, a storage controller designated by the management apparatus changes from the normal operation state into the standing-by state and the other storage controllers except for the designated storage controller change from the normal operation state into the degraded operation state. The storage controller in the standing-by state changes into the degraded operation state in response to stop of a storage controller in the degraded operation state because of occurrence of a failure under the degraded operation mode.
    Type: Application
    Filed: March 12, 2024
    Publication date: December 5, 2024
    Inventors: Hiroka IHARA, Sadahiro SUGIMOTO, Tomohiro YOSHIHARA
  • Patent number: 12113721
    Abstract: A network interface includes a processor, memory, and a cache between the processor and the memory. The processor secures a plurality of buffers for storing transfer data in the memory, and manages an allocation order of available buffers of the plurality of buffers. The processor returns a buffer released after data transfer to a position before a predetermined position of the allocation order.
    Type: Grant
    Filed: June 5, 2023
    Date of Patent: October 8, 2024
    Assignee: HITACHI, LTD.
    Inventors: Nobuhiro Yokoi, Hiroka Ihara
  • Patent number: 11855778
    Abstract: A network interface for a storage controller includes a processor and a memory that stores an instruction code to be executed by the processor. The processor executes protocol processing for transmitting and receiving packets via a network. The processor reproduces a first packet not received from the network, from a plurality of other received packets included in an error correction packet group same as that of the first packet.
    Type: Grant
    Filed: September 13, 2021
    Date of Patent: December 26, 2023
    Assignee: HITACHI, LTD.
    Inventors: Nobuhiro Yokoi, Hiroka Ihara, Akira Deguchi
  • Publication number: 20230400982
    Abstract: A storage system includes: a central processing unit; a main memory; first management information that associates a hash value of received data with an address in a volume; and an I/O processing package. The I/O processing package includes an I/O processor and an I/O memory. The I/O processor executes protocol processing. The I/O processor executes at least a part of search processing of an address associated with a hash value of first received data in the first management information. The central processing unit controls execution of deduplication processing of the first received data based on data of an address associated with the hash value of the first received data.
    Type: Application
    Filed: March 1, 2023
    Publication date: December 14, 2023
    Applicant: Hitachi, Ltd.
    Inventors: Hiroka IHARA, Nobuhiro YOKOI, Takashi NAGAO, Yoshihiro YOSHII
  • Publication number: 20230328008
    Abstract: A network interface includes a processor, memory, and a cache between the processor and the memory. The processor secures a plurality of buffers for storing transfer data in the memory, and manages an allocation order of available buffers of the plurality of buffers. The processor returns a buffer released after data transfer to a position before a predetermined position of the allocation order.
    Type: Application
    Filed: June 5, 2023
    Publication date: October 12, 2023
    Inventors: Nobuhiro YOKOI, Hiroka IHARA
  • Publication number: 20230305731
    Abstract: A primary storage system reads a plurality of journal data, and performs collective compression that is compression of data that is at least a part of the plurality of pieces of journal data in the plurality of journals and is larger than a size of one journal data. The collectively compressed data, which is a plurality of pieces of journal data subjected to collective compression, is a transfer target from the primary storage system to the secondary storage system. The journal is journal data and metadata including a write order of the journal data and associated with the journal data. The journal data is a copy of data written in the primary volume. The secondary storage system acquires a plurality of pieces of journal data by decompressing one or more pieces of collectively compressed data, and writes the plurality of pieces of journal data to the secondary volume.
    Type: Application
    Filed: May 17, 2023
    Publication date: September 28, 2023
    Inventors: Akira DEGUCHI, Nobuhiro YOKOI, Hiroka IHARA
  • Patent number: 11700214
    Abstract: A network interface includes a processor, memory, and a cache between the processor and the memory. The processor secures a plurality of buffers for storing transfer data in the memory, and manages an allocation order of available buffers of the plurality of buffers. The processor returns a buffer released after data transfer to a position before a predetermined position of the allocation order.
    Type: Grant
    Filed: August 26, 2022
    Date of Patent: July 11, 2023
    Assignee: HITACHI, LTD.
    Inventors: Nobuhiro Yokoi, Hiroka Ihara
  • Patent number: 11675523
    Abstract: A primary storage system reads a plurality of journal data, and performs collective compression that is compression of data that is at least a part of the plurality of pieces of journal data in the plurality of journals and is larger than a size of one journal data. The collectively compressed data, which is a plurality of pieces of journal data subjected to collective compression, is a transfer target from the primary storage system to the secondary storage system. The journal is journal data and metadata including a write order of the journal data and associated with the journal data. The journal data is a copy of data written in the primary volume. The secondary storage system acquires a plurality of pieces of journal data by decompressing one or more pieces of collectively compressed data, and writes the plurality of pieces of journal data to the secondary volume.
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: June 13, 2023
    Assignee: Hitachi, Ltd.
    Inventors: Akira Deguchi, Nobuhiro Yokoi, Hiroka Ihara
  • Publication number: 20230177266
    Abstract: Sentences associated with diagrams or tables are extracted in a wider range. In a sentence extracting device that includes a processor and extracts a sentence associated with a diagram or a table from a body of a digital document including the diagram or the table and the body, the diagram or the table includes a label, a caption, and a body. The processor includes extraction units 202 to 205 that extract, from the body, a sentence including a second word associated with a first word included in the body of the diagram or the table.
    Type: Application
    Filed: April 26, 2021
    Publication date: June 8, 2023
    Inventors: Hiroka IHARA, Akio SHIMADA, Mitsuo HAYASAKA
  • Patent number: 11556269
    Abstract: An information processing system includes a first storage system for supplying a primary site, and a second storage system for supplying a secondary site. The first storage system is allowed to execute replication by transferring a processing history of a data volume of the first storage system to the second storage system, and to transfer multiple processing histories collectively. The first storage system integrates histories of multiple write accesses included in the multiple processing histories to be collectively transferred, which are duplicatedly addressed on the volume for transfer.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: January 17, 2023
    Assignee: HITACHI, LTD.
    Inventors: Hiroka Ihara, Nobuhiro Yokoi, Akira Deguchi
  • Publication number: 20220276785
    Abstract: A primary storage system reads a plurality of journal data, and performs collective compression that is compression of data that is at least a part of the plurality of pieces of journal data in the plurality of journals and is larger than a size of one journal data. The collectively compressed data, which is a plurality of pieces of journal data subjected to collective compression, is a transfer target from the primary storage system to the secondary storage system. The journal is journal data and metadata including a write order of the journal data and associated with the journal data. The journal data is a copy of data written in the primary volume. The secondary storage system acquires a plurality of pieces of journal data by decompressing one or more pieces of collectively compressed data, and writes the plurality of pieces of journal data to the secondary volume.
    Type: Application
    Filed: September 10, 2021
    Publication date: September 1, 2022
    Inventors: Akira DEGUCHI, Nobuhiro YOKOI, Hiroka IHARA
  • Publication number: 20220255665
    Abstract: A network interface for a storage controller includes a processor and a memory that stores an instruction code to be executed by the processor. The processor executes protocol processing for transmitting and receiving packets via a network. The processor reproduces a first packet not received from the network, from a plurality of other received packets included in an error correction packet group same as that of the first packet.
    Type: Application
    Filed: September 13, 2021
    Publication date: August 11, 2022
    Inventors: Nobuhiro YOKOI, Hiroka IHARA, Akira DEGUCHI
  • Publication number: 20220179559
    Abstract: An information processing system includes a first storage system for supplying a primary site, and a second storage system for supplying a secondary site. The first storage system is allowed to execute replication by transferring a processing history of a data volume of the first storage system to the second storage system, and to transfer multiple processing histories collectively. The first storage system integrates histories of multiple write accesses included in the multiple processing histories to be collectively transferred, which are duplicatedly addressed on the volume for transfer.
    Type: Application
    Filed: September 9, 2021
    Publication date: June 9, 2022
    Inventors: Hiroka IHARA, Nobuhiro YOKOI, Akira DEGUCHI