Patents by Inventor Hirokatsu SHIRAHAMA

Hirokatsu SHIRAHAMA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10171067
    Abstract: A waveform shaping filter according to an embodiment includes at least one filter stage and a control circuit. The filter stage includes a differentiation signal generation circuit, a proportional signal generation circuit, and an adder circuit. The differentiation signal generation circuit generates a differentiation signal obtained by amplifying a differentiation component of an input signal. The proportional signal generation circuit generates a proportional signal obtained by amplifying the input signal. The adder circuit outputs an output signal obtained by adding the proportional signal and the differentiation signal. The control circuit compares the output signal and a first detection level, detects at least one of an overshoot and an undershoot of the output signal, and controls a time constant of the filter stage, based on a detection result.
    Type: Grant
    Filed: February 25, 2016
    Date of Patent: January 1, 2019
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tetsuro Itakura, Masanori Furuta, Shunsuke Kimura, Hideyuki Funaki, Go Kawata, Hirokatsu Shirahama
  • Patent number: 10041830
    Abstract: A radiation detection apparatus according to an embodiment includes a radiation detector that detects radiation; a first measurer that measures energy of the radiation from the radiation detected by the radiation detector; and a second measurer that measures the number of times that the radiation detector detects the radiation.
    Type: Grant
    Filed: September 15, 2016
    Date of Patent: August 7, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shunsuke Kimura, Go Kawata, Hideyuki Funaki, Masanori Furuta, Hirokatsu Shirahama, Tetsuro Itakura
  • Patent number: 9952334
    Abstract: A pulse detection circuit according to an embodiment includes a conversion circuit, a delay circuit, first and second comparators, a latch, and a generation circuit. The conversion circuit converts an input signal into a thermometer code signal. The delay circuit outputs a delay signal being the thermometer code signal delayed by a predetermined delay time. The first comparator (The second comparator) compares the thermometer code signal with the delay signal and outputs an increase signal (a decrease signal) indicating whether the input signal is larger (smaller) than the input signal before the delay time. Based on the increase signal and the decrease signal, the latch outputs an increase-decrease signal indicating whether the input signal is increasing or decreasing. Based on the thermometer code signal and the increase-decrease signal, the generation circuit generates a pulse detection signal and a pileup detection signal.
    Type: Grant
    Filed: May 26, 2016
    Date of Patent: April 24, 2018
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hirokatsu Shirahama, Tetsuro Itakura, Masanori Furuta, Shunsuke Kimura, Go Kawata, Hideyuki Funaki
  • Patent number: 9864068
    Abstract: According to an embodiment, a circuit includes a shunt and a controller. The shunt shunts input current into a plurality of current paths. The controller controls a gain of current inputted to the shunt by combining the current that is shunted into the current paths by the shunt in combination corresponding to a first signal from the outside or changing a shunt ratio with which the shunt shunts the current into the current paths corresponding to the first signal.
    Type: Grant
    Filed: November 20, 2015
    Date of Patent: January 9, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shunsuke Kimura, Hirokatsu Shirahama, Go Kawata, Masanori Furuta, Hideyuki Funaki, Tetsuro Itakura
  • Publication number: 20170344006
    Abstract: An autonomous control system according to an embodiment includes a memory; and processing circuitry. The processing circuitry configured to detect surrounding information of an object. The processing circuitry configured to identify identification information indicating the object from the surrounding information. The processing circuitry configured to determine an increase and decrease in stress information of a user. The processing circuitry configured to learn correction information for correcting an operation of the object, to an operation of reducing the stress of the user. The processing circuitry configured to determine a type of control relative to the object, and determine control information for specifying the operation of the object by the determined type of control, from the identification information and the correction information. The processing circuitry configured to control the object by the control information.
    Type: Application
    Filed: February 27, 2017
    Publication date: November 30, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hideo KASAMI, Hirokatsu Shirahama
  • Patent number: 9787284
    Abstract: A waveform shaping filter according to one embodiment includes a first resistor, a first transistor, a first capacitor, and a first amplifier. The first resistor includes one end to which a signal current is input and the other end. The first transistor includes a first terminal connected to the other end of the first resistor, a second terminal, and a control terminal. The first capacitor includes one end connected to the other end of the first resistor and the other end. The first amplifier includes an input terminal connected to the one end of the first resistor and an output terminal connected to the control terminal of the first transistor.
    Type: Grant
    Filed: January 19, 2016
    Date of Patent: October 10, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuro Itakura, Masanori Furuta, Shunsuke Kimura, Hideyuki Funaki, Go Kawata, Hirokatsu Shirahama
  • Publication number: 20170248464
    Abstract: A radiation detection apparatus according to an embodiment includes a radiation detector that detects radiation; a first measurer that measures energy of the radiation from the radiation detected by the radiation detector; and a second measurer that measures the number of times that the radiation detector detects the radiation.
    Type: Application
    Filed: September 15, 2016
    Publication date: August 31, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shunsuke KIMURA, Go KAWATA, Hideyuki FUNAKI, Masanori FURUTA, Hirokatsu SHIRAHAMA, Tetsuro ITAKURA
  • Patent number: 9647677
    Abstract: An integrator according to an embodiment includes first and second nodes, first to fifth switches, first and second main integration capacitors, and a first subsidiary integration capacitor. The first (second, third, fourth, fifth) switch has one end connected to a first (third, first, fourth, first) node and the other end connected to a third (second, fourth, second, fifth) node. The first main integration capacitor has one end connected to the third node and the other end connected to a standard voltage line. The second main integration capacitor has one end connected to the fourth node and the other end connected to the standard voltage line. The first subsidiary integration capacitor that has one end connected to the fifth node and the other end connected to the standard voltage line.
    Type: Grant
    Filed: April 26, 2016
    Date of Patent: May 9, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hirokatsu Shirahama, Shunsuke Kimura, Tetsuro Itakura, Masanori Furuta, Hideyuki Funaki, Go Kawata
  • Publication number: 20170005667
    Abstract: An integrator according to an embodiment includes first and second nodes, first to fifth switches, first and second main integration capacitors, and a first subsidiary integration capacitor. The first (second, third, fourth, fifth) switch has one end connected to a first (third, first, fourth, first) node and the other end connected to a third (second, fourth, second, fifth) node. The first main integration capacitor has one end connected to the third node and the other end connected to a standard voltage line. The second main integration capacitor has one end connected to the fourth node and the other end connected to the standard voltage line. The first subsidiary integration capacitor that has one end connected to the fifth node and the other end connected to the standard voltage line.
    Type: Application
    Filed: April 26, 2016
    Publication date: January 5, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hirokatsu SHIRAHAMA, Shunsuke KIMURA, Tetsuro ITAKURA, Masanori FURUTA, Hideyuki FUNAKI, Go KAWATA
  • Publication number: 20160349380
    Abstract: A pulse detection circuit according to an embodiment includes a conversion circuit, a delay circuit, first and second comparators, a latch, and a generation circuit. The conversion circuit converts an input signal into a thermometer code signal. The delay circuit outputs a delay signal being the thermometer code signal delayed by a predetermined delay time. The first comparator (The second comparator) compares the thermometer code signal with the delay signal and outputs an increase signal (a decrease signal) indicating whether the input signal is larger (smaller) than the input signal before the delay time. Based on the increase signal and the decrease signal, the latch outputs an increase-decrease signal indicating whether the input signal is increasing or decreasing. Based on the thermometer code signal and the increase-decrease signal, the generation circuit generates a pulse detection signal and a pileup detection signal.
    Type: Application
    Filed: May 26, 2016
    Publication date: December 1, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hirokatsu SHIRAHAMA, Tetsuro Itakura, Masanori Furuta, Shunsuke Kimura, Go Kawata, Hideyuki Funaki
  • Publication number: 20160274246
    Abstract: According to an embodiment, a circuit includes a shunt and a controller. The shunt shunts input current into a plurality of current paths. The controller controls a gain of current inputted to the shunt by combining the current that is shunted into the current paths by the shunt in combination corresponding to a first signal from the outside or changing a shunt ratio with which the shunt shunts the current into the current paths corresponding to the first signal.
    Type: Application
    Filed: November 20, 2015
    Publication date: September 22, 2016
    Inventors: Shunsuke KIMURA, Hirokatsu SHIRAHAMA, Go Kawata, Masanori FURUTA, Hideyuki FUNAKI, Tetsuro ITAKURA
  • Publication number: 20160269006
    Abstract: A waveform shaping filter according to an embodiment includes at least one filter stage and a control circuit. The filter stage includes a differentiation signal generation circuit, a proportional signal generation circuit, and an adder circuit. The differentiation signal generation circuit generates a differentiation signal obtained by amplifying a differentiation component of an input signal. The proportional signal generation circuit generates a proportional signal obtained by amplifying the input signal. The adder circuit outputs an output signal obtained by adding the proportional signal and the differentiation signal. The control circuit compares the output signal and a first detection level, detects at least one of an overshoot and an undershoot of the output signal, and controls a time constant of the filter stage, based on a detection result.
    Type: Application
    Filed: February 25, 2016
    Publication date: September 15, 2016
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tetsuro ITAKURA, Masanori FURUTA, Shunsuke KIMURA, Hideyuki FUNAKI, Go KAWATA, Hirokatsu SHIRAHAMA
  • Publication number: 20160211830
    Abstract: A waveform shaping filter according to one embodiment includes a first resistor, a first transistor, a first capacitor, and a first amplifier. The first resistor includes one end to which a signal current is input and the other end. The first transistor includes a first terminal connected to the other end of the first resistor, a second terminal, and a control terminal. The first capacitor includes one end connected to the other end of the first resistor and the other end. The first amplifier includes an input terminal connected to the one end of the first resistor and an output terminal connected to the control terminal of the first transistor.
    Type: Application
    Filed: January 19, 2016
    Publication date: July 21, 2016
    Inventors: Tetsuro ITAKURA, Masanori FURUTA, Shunsuke KIMURA, Hideyuki FUNAKI, Go KAWATA, Hirokatsu SHIRAHAMA