Abstract: An electro-static discharge protection circuit comprises a thyristor mode ensuring circuit and a thyristor rectifier circuit. The thyristor mode ensuring circuit includes a capacitive element C1 connected between a higher potential line Vdd and a lower potential line Vss, and ensures a constant and sufficient capacity independently of the number of input/output signal bits, even when the number of input/output signal bits is the theoretical minimum, i.e. 1, so that a surge current induced by electro-static discharge (ESD) applied to an output pad Vout is injected into the first capacitive element C1 in order to charge it. Thus, by means of the current caused by the surge current, the thyristor rectifier circuit is triggered into a thyristor mode, which allows the surge current to flow to the lower potential line Vss through the thyristor rectifier circuit, resulting in a CMOS inverter of an internal circuitry being effectively protected against the surge current.