Patents by Inventor Hirokazu Fukaya

Hirokazu Fukaya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4596957
    Abstract: An amplifier switchable between a dual-channel amplifier and a BTL amplifier includes first and second amplifying circuits having a non-inverting input, an inverting input and an output, a first input terminal receiving a first input signal and applying it to the non-inverting input of the first amplifying circuit, a second input terminal receiving a second input signal, a first switch selectively applying a signal to the non-inverting input of the first or second amplifying circuit, a second switch controlling the application of an output from the first amplifying circuit to the inverting input of the second amplifying circuit, a controlling circuit controlling the first and second switches, first through third loads and a third switch controlling the application of an output from the first and second amplifying circuits to the first and second loads, respectively, or to the respective ends of the third load.
    Type: Grant
    Filed: August 10, 1984
    Date of Patent: June 24, 1986
    Assignee: Nippon Electric Company Limited
    Inventors: Hirokazu Fukaya, Haruo Niki
  • Patent number: 4552118
    Abstract: A pulse width control circuit for controlling a pulse width of the output signal using a negative feedback signal, which includes a circuit for detecting the pulse width of the output signal. This detector circuit generates a detection output when the pulse width of the output signal is shorter than a predetermined width. There is also provided a circuit operating in response to the detection output, which circuit acts on the control circuit to forcibly vary the feedback signal, resulting in that the pulse width of the output signal is broadened.
    Type: Grant
    Filed: March 19, 1984
    Date of Patent: November 12, 1985
    Assignee: NEC Corporation
    Inventor: Hirokazu Fukaya
  • Patent number: 4509494
    Abstract: In a pulse width control circuit receiving a periodic input signal and controlling the width of an output pulse by means of a negative feedback loop, the value of power source voltage is detected and when a prescribed power source voltage is detected, the amount of the negative feedback is varied in response to the detection of the prescribed power source voltage to vary the width of the output pulse correspondingly.
    Type: Grant
    Filed: June 9, 1982
    Date of Patent: April 9, 1985
    Assignee: Nippon Electric Company, Ltd.
    Inventors: Shigeo Nishitoba, Hirokazu Fukaya
  • Patent number: 4494077
    Abstract: An amplifier switchable between a dual-channel amplifier and a BTL amplifier includes first and second amplifying circuits having a non-inverting input, an inverting input and an output, a first input terminal receiving a first input signal and applying it to the non-inverting input of the first amplifying circuit, a second input terminal receiving a second input signal, a first switch selectively applying a signal to the non-inverting input of the first or second amplifying circuit, a second switch controlling the application of an output from the first amplifying circuit to the inverting input of the second amplifying circuit, a controlling circuit controlling the first and second switches, first through third loads and a third switch controlling the application of an output from the first and second amplifying circuits to the first and second loads, respectively, or to the respective ends of the third load.
    Type: Grant
    Filed: December 2, 1982
    Date of Patent: January 15, 1985
    Assignee: Nippon Electric Co., Ltd.
    Inventors: Hirokazu Fukaya, Haruo Niki
  • Patent number: 4469082
    Abstract: An ignition coil control circuit compares the coil input current with a reference level, and the duty ratio of the output current is altered accordingly. The reference level is raised during cold weather operations, raising the duty ratio. Once the operating temperature of the engine rises above a predetermined level, a detector circuit activates a control signal generator which lowers the reference level received by the comparator to lower the duty ratio accordingly.
    Type: Grant
    Filed: June 14, 1982
    Date of Patent: September 4, 1984
    Assignee: Nippon Electric Co., Ltd.
    Inventors: Shigeo Nishitoba, Hirokazu Fukaya
  • Patent number: 4330757
    Abstract: The present invention prevents the destruction of an output transistor when the output terminal of a single-ended push-pull type power amplification circuit connects to a ground line or other section to form a short circuit. That is, the base-emitter of a current-detection transistor of the same conduction type as that of the transistor to be protected is connected between the base and emitter of the output transistor to be protected. The collector current of this current-detection transistor is applied to a current-voltage conversion means through a current mirror circuit, and the voltage of the current-voltage conversion means is compared with that of the output terminal by a comparator transistor. With the output of the comparator transistor, the supply of a base current to the transistor to be protected is stopped.
    Type: Grant
    Filed: August 9, 1979
    Date of Patent: May 18, 1982
    Assignee: Nippon Electric Co., Ltd.
    Inventors: Hirokazu Fukaya, Hisashi Togari
  • Patent number: 4287390
    Abstract: A power amplifier having first and second amplifiers each including an output stage consisting of series connections of collector-emitter paths of first and second output transistors connected between power supply terminals is disclosed. Each first and second transistor is driven alternately in response to an input signal fed through an input terminal, and each output transistor is provided with an over-current detector circuit. Protective circuits are responsive to the detection outputs of the detector circuits to protect the corresponding output transistors. The output terminals of the power amplifier are respectively connected to the common junction of the first and second output transistors of the first and second amplifiers, and a load such as a speaker is connected between the output terminals. Circuits are provided to apply the outputs of the over-current detector circuits in one amplifier to the corresponding protective circuits in the other amplifier, and vice versa.
    Type: Grant
    Filed: May 31, 1979
    Date of Patent: September 1, 1981
    Assignee: Nippon Electric Co., Ltd.
    Inventors: Hirokazu Fukaya, Masashi Shoji
  • Patent number: 4227127
    Abstract: A motor speed control circuit includes a resistor, a voltage reference circuit, a first voltage comparator, a current mirror circuit for deriving first and second output currents according to the output of the first voltage comparator, and a motor. A voltage consisting of the sum of a reference voltage and a voltage generated across the resistor by the first output current of the current mirror circuit is applied to the first input terminal of the first voltage comparator. The second output current of the current mirror circuit is fed to the motor and to the second input terminal of the first voltage comparator. A second comparator detects the voltage difference between the first and second input terminals of the first voltage comparator. The output of the second comparator is applied to the current mirror circuit to enhance the starting torque of the motor.
    Type: Grant
    Filed: November 20, 1978
    Date of Patent: October 7, 1980
    Assignee: Nippon Electric Co., Ltd.
    Inventors: Hirokazu Fukaya, Jun Kishi
  • Patent number: 4054847
    Abstract: A pulse oscillator circuit comprises a first pulse oscillator, which may be in the form of a monostable multivibrator, that is capable of generating a first pulse. A second pulse oscillator, which may be in the form of an astable multivibrator, is operatively connected to the first pulse oscillator and is operated for the period for which the first pulse is present. The second pulse oscillator generates a second pulse of a pulse width that is narrower than the width of the first pulse.
    Type: Grant
    Filed: February 3, 1976
    Date of Patent: October 18, 1977
    Assignee: Nippon Electric Co., Ltd.
    Inventor: Hirokazu Fukaya
  • Patent number: 4001715
    Abstract: A vertical deflection circuit used in television receivers, comprising a free-running oscillator capable of synchronous oscillation triggered by a vertical synchronizing signal separated from a composite synchronizing signal is disclosed. The vertical deflection circuit has a switch means which operates under synchronous control by the vertical synchronizing pulse and prevents the application of a vertical trigger signal to the free-running oscillator at least for the period from the time at which the free-running oscillator has been triggered to the time corresponding to the end of the vertical synchronizing pulse period of the composite synchronizing signal.
    Type: Grant
    Filed: May 8, 1975
    Date of Patent: January 4, 1977
    Assignee: Nippon Electric Company, Ltd.
    Inventor: Hirokazu Fukaya
  • Patent number: 3979605
    Abstract: This invention relates to an integrating circuit especially suitable for use as a vertical synchronizing signal separation circuit in a television receiver set, which comprises a transistor, a parallel circuit of a resistor and a capacitor connected between the emitter of the transistor and the ground, a capacitor connected between the base and the emitter of the transistor, and a resistor connected between the base of the transistor and an input terminal. A composite synchronizing signal applied to the input terminal is fed to the base, and a vertical synchronizing signal can be derived either from the emitter or from the collector of the transistor. Owing to a positive feedback effect, the vertical synchronizing signal can be obtained as a sufficiently large signal even if the applied composite synchronizing signal is weak.
    Type: Grant
    Filed: March 14, 1975
    Date of Patent: September 7, 1976
    Assignee: Nippon Electric Company, Ltd.
    Inventor: Hirokazu Fukaya
  • Patent number: 3969653
    Abstract: A deflection circuit for a television receiver is made more suitable for single chip integrated circuit construction by utilizing a switching means connected between a part of the transistor amplifier used to amplify a saw-tooth wave form and a power source. This permits a part of the energy stored in the deflection coil to be released through the amplifier during retrace intervals.
    Type: Grant
    Filed: December 24, 1974
    Date of Patent: July 13, 1976
    Assignee: Nippon Electric Company, Ltd.
    Inventor: Hirokazu Fukaya
  • Patent number: 3952213
    Abstract: Delayed pulses are produced by a circuit in which an initiating input pulse causes signals to be supplied to two threshold circuits. The outputs of the threshold circuits are supplied to a gate circuit having an output determined by the difference in time of occurrence of the trailing edges of the output pulses generated by the threshold circuits.
    Type: Grant
    Filed: August 27, 1974
    Date of Patent: April 20, 1976
    Assignee: Nippon Electric Company Limited
    Inventor: Hirokazu Fukaya
  • Patent number: 3950672
    Abstract: A vertical sweep circuit includes a first transistor supplied with a sawtooth voltage. A voltage drop is developed across a resistor by a vertical sweep current for producing a first voltage across a first load. A second transistor is supplied with the first voltage for producing a second voltage across a second load, and a pair of push-pull connected transistors are supplied with the second voltage for producing the sweep current. An additional transistor of the same conductivity type as the second transistor is included in the circuit. Responsive to the first voltage, the additional transistor produces voltage pulses at a point of connection thereto of an additional load, which is greater than the second load to make the second and additional transistors operate as a linear amplifier transistor and a switching transistor, respectively. Vertical blanking pulses are produced from the voltage pulses.
    Type: Grant
    Filed: June 10, 1974
    Date of Patent: April 13, 1976
    Assignee: Nippon Electric Co., Ltd.
    Inventors: Hirokazu Fukaya, Kenji Andou, Akio Nakashima
  • Patent number: RE29286
    Abstract: A power amplifier includes a bootstrapped driver circuit in which the load element is divided into two parts. A single-ended push-pull circuit provides a feedback to the junction point of those two parts. A resistor element having 0.1 to 10 times the resistance of the load element is connected in parallel with the load element.
    Type: Grant
    Filed: October 4, 1976
    Date of Patent: June 28, 1977
    Assignee: Nippon Electric Company, Limited
    Inventors: Hirokazu Fukaya, Naotoshi Higashiyama