Patents by Inventor Hirokazu Kanma

Hirokazu Kanma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7136956
    Abstract: A semiconductor device includes: a plurality of function blocks; a plurality of buses, each of which is respectively connected to one of the plurality of function blocks; a plurality of control signal lines, each of which is respectively connected to one of the plurality of function blocks; a main bus; a bus control unit connected to the main bus; a bus division control unit located between the plurality of buses and the main bus, for connecting one of the plurality of buses to the main bus and transmitting a control signal to a corresponding one of the plurality of control signal lines in accordance with a decoded result of information supplied from the bus control unit via the main bus, thereby controlling a corresponding one of the plurality of function blocks.
    Type: Grant
    Filed: March 6, 2002
    Date of Patent: November 14, 2006
    Assignee: Fujitsu Limited
    Inventors: Kenji Furuya, Hirokazu Kanma
  • Publication number: 20050165990
    Abstract: The interrupt control device is a Large Scale Integration (LSI) to which a wide variety of other devices, such as macros, can be connected. The interrupt control device includes a plurality of interrupt controllers that executes interrupt processing; a receiving unit that receives an interrupt signal from any one of the other devices; an interrupt number storing unit that stores an interrupt number assigned to a device from which the interrupt signal is received; and an outputting unit that outputs the interrupt signal to one of the interrupt controllers corresponding to the interrupt number stored.
    Type: Application
    Filed: March 21, 2005
    Publication date: July 28, 2005
    Inventors: Kazunori Kuki, Masahiro Tanaka, Hirokazu Kanma
  • Publication number: 20030049897
    Abstract: A semiconductor device includes: a plurality of function blocks; a plurality of buses, each of which is respectively connected to one of the plurality of function blocks; a plurality of control signal lines, each of which is respectively connected to one of the plurality of function blocks; a main bus; a bus control unit connected to the main bus; a bus division control unit located between the plurality of buses and the main bus, for connecting one of the plurality of buses to the main bus and transmitting a control signal to a corresponding one of the plurality of control signal lines in accordance with a decoded result of information supplied from the bus control unit via the main bus, thereby controlling a corresponding one of the plurality of function blocks.
    Type: Application
    Filed: March 6, 2002
    Publication date: March 13, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Kenji Furuya, Hirokazu Kanma
  • Patent number: 5914903
    Abstract: A semiconductor memory device includes a plurality of cell blocks each having a plurality of memory cells, a plurality of bit lines for reading data from the individual memory cells, and a precharge circuit for precharging one bit line selected from among the plurality of bit lines in response to a precharge signal. It is determined whether charge in the precharged bit line is to be discharged based on a data content of a memory cell in the cell block selected by a row decoder connected to the bit line. The data content of the selected memory cell in the selected cell block is read out by a potential of the bit line. The memory device further includes at least one gate switching element connected in series to the memory cells of each of the cell blocks. The gate switching element, together with the memory cells of each cell block, forms a series circuit which has one end connected to an associated one of the bit lines and a second end connected to a low-voltage power supply.
    Type: Grant
    Filed: January 30, 1998
    Date of Patent: June 22, 1999
    Assignee: Fujitsu Limited
    Inventors: Hirokazu Kanma, Akira Takenouchi, Masahiro Tanaka