Patents by Inventor Hirokazu Kawai

Hirokazu Kawai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4071905
    Abstract: A binary full adder/subtractor circuit includes an exclusive OR gate operating upon augend/minuend and addend/subtrahend binary input signals. The sum/difference output from the circuit is the carry/borrow input signal or its inverse depending upon the output state of the exclusive OR gate. The carry/borrow output of the circuit comprises either the carry/borrow input or the addend/subtrahend input, as determined by the output of the exclusive OR gate and by an operation (sum/difference) specifying input signal.
    Type: Grant
    Filed: October 27, 1976
    Date of Patent: January 31, 1978
    Assignee: Nippon Electric Co., Ltd.
    Inventors: Tetsuji Oguchi, Hirokazu Kawai