Patents by Inventor Hirokazu Kikuchi

Hirokazu Kikuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120199982
    Abstract: A semiconductor device according to an embodiment includes: a semiconductor substrate; a plurality of interconnect layers disposed at different heights from the semiconductor substrate, each interconnect layer including an interconnection formed therein; and a via formed in a columnar shape extending in the stack direction of the interconnect layers, the via electrically connecting the interconnections of the different interconnect layers, the interconnections including a plurality of intermediate interconnections in contact with the via in the intermediate portion thereof, the intermediate interconnections including a plurality of first type intermediate interconnections passing through the via in a direction perpendicular to the stack direction, and the first type intermediate interconnection of a first one of the interconnect layer and the first type intermediate interconnection of a second one of the interconnect layer are intersecting each other in the via.
    Type: Application
    Filed: February 3, 2012
    Publication date: August 9, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Hirokazu KIKUCHI
  • Patent number: 7879670
    Abstract: A method of manufacturing a nonvolatile storage device having memory cell arrays according to an embodiment of the present invention includes forming, in a memory cell array forming region above a processed film, first columnar members arrayed at substantially equal intervals in the first direction and the second direction, forming, concerning at least arrays as a part of arrays of the first columnar members in the first direction, second columnar members long in section having major axes longer than sections of the first columnar members outside of the memory cell array forming region such that the major axes are set in the first direction and the second columnar members continue to ends of the arrays, and forming, in the same manner as above, third columnar members, which continue to arrays of the first columnar members in the second direction.
    Type: Grant
    Filed: September 4, 2009
    Date of Patent: February 1, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroyuki Nansei, Toshiharu Tanaka, Hirokazu Kikuchi
  • Publication number: 20100261330
    Abstract: A method of manufacturing a nonvolatile storage device having memory cell arrays according to an embodiment of the present invention includes forming, in a memory cell array forming region above a processed film, first columnar members arrayed at substantially equal intervals in the first direction and the second direction, forming, concerning at least arrays as a part of arrays of the first columnar members in the first direction, second columnar members long in section having major axes longer than sections of the first columnar members outside of the memory cell array forming region such that the major axes are set in the first direction and the second columnar members continue to ends of the arrays, and forming, in the same manner as above, third columnar members, which continue to arrays of the first columnar members in the second direction.
    Type: Application
    Filed: September 4, 2009
    Publication date: October 14, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hiroyuki Nansei, Toshiharu Tanaka, Hirokazu Kikuchi